AcoSail/kernel_optimize_test
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libata: Trim trailing whitespace

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Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Jeff Garzik 2007-05-21 20:14:23 -04:00
parent bc9a8a7eaa
commit a617c09f6d
8 changed files with 17 additions and 17 deletions
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2
drivers/ata/Kconfig
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@ -132,7 +132,7 @@ config SATA_SIS
depends on PCI
select PATA_SIS
help
This option enables support for SiS Serial ATA on
This option enables support for SiS Serial ATA on
SiS 964/965/966/180 and Parallel ATA on SiS 180.
The PATA support for SiS 180 requires additionally to
enable the PATA_SIS driver in the config.

8
drivers/ata/libata-core.c
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@ -977,7 +977,7 @@ static u64 ata_hpa_resize(struct ata_device *dev)
{
u64 sectors = dev->n_sectors;
u64 hpa_sectors;
if (ata_id_has_lba48(dev->id))
hpa_sectors = ata_read_native_max_address_ext(dev);
else
@ -1588,7 +1588,7 @@ unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
* Check if the current speed of the device requires IORDY. Used
* by various controllers for chip configuration.
*/
unsigned int ata_pio_need_iordy(const struct ata_device *adev)
{
/* Controller doesn't support IORDY. Probably a pointless check
@ -1611,7 +1611,7 @@ unsigned int ata_pio_need_iordy(const struct ata_device *adev)
* Compute the highest mode possible if we are not using iordy. Return
* -1 if no iordy mode is available.
*/
static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
{
/* If we have no drive specific rule, then PIO 2 is non IORDY */
@ -2663,7 +2663,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
t->active += (t->cycle - (t->active + t->recover)) / 2;
t->recover = t->cycle - t->active;
}
/* In a few cases quantisation may produce enough errors to
leave t->cycle too low for the sum of active and recovery
if so we must correct this */

2
drivers/ata/libata-eh.c
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@ -1009,7 +1009,7 @@ static unsigned int atapi_eh_request_sense(struct ata_queued_cmd *qc)
sense_buf[0] = 0x70;
sense_buf[2] = qc->result_tf.feature >> 4;
/* some devices time out if garbage left in tf */
/* some devices time out if garbage left in tf */
ata_tf_init(dev, &tf);
memset(cdb, 0, ATAPI_CDB_LEN);

2
drivers/ata/pata_artop.c
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@ -99,7 +99,7 @@ static int artop6260_pre_reset(struct ata_port *ap, unsigned long deadline)
*
* Identify the cable type for the ARTOp interface in question
*/
static int artop6260_cable_detect(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);

4
drivers/ata/pata_cmd640.c
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@ -107,7 +107,7 @@ static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
} else {
/* Save the shared timings for channel, they will be loaded
by qc_issue_prot. Reloading the setup time is expensive
by qc_issue_prot. Reloading the setup time is expensive
so we keep a merged one loaded */
pci_read_config_byte(pdev, ARTIM23, &reg);
reg &= 0x3F;
@ -231,7 +231,7 @@ static void cmd640_hardware_init(struct pci_dev *pdev)
pci_write_config_byte(pdev, CMDTIM, 0);
/* 512 byte bursts (sector) */
pci_write_config_byte(pdev, BRST, 0x40);
/*
/*
* A reporter a long time ago
* Had problems with the data fifo
* So don't run the risk

10
drivers/ata/pata_hpt37x.c
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@ -961,7 +961,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
u8 mcr1;
u32 freq;
int prefer_dpll = 1;
unsigned long iobase = pci_resource_start(dev, 4);
const struct hpt_chip *chip_table;
@ -1055,7 +1055,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
*/
pci_write_config_byte(dev, 0x5b, 0x23);
/*
* HighPoint does this for HPT372A.
* NOTE: This register is only writeable via I/O space.
@ -1088,7 +1088,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
* Turn the frequency check into a band and then find a timing
* table to match it.
*/
clock_slot = hpt37x_clock_slot(freq, chip_table->base);
if (chip_table->clocks[clock_slot] == NULL || prefer_dpll) {
/*
@ -1099,11 +1099,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
*/
unsigned int f_low, f_high;
int adjust;
clock_slot = 2;
if (port->udma_mask & 0xE0)
clock_slot = 3;
f_low = (MHz[clock_slot] * chip_table->base) / 192;
f_high = f_low + 2;

4
drivers/ata/sata_nv.c
View File

@ -802,7 +802,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
u16 status;
u32 gen_ctl;
u32 notifier, notifier_error;
/* if ADMA is disabled, use standard ata interrupt handler */
if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) {
u8 irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804)
@ -963,7 +963,7 @@ static void nv_adma_irq_clear(struct ata_port *ap)
/* clear ADMA status */
writew(0xffff, mmio + NV_ADMA_STAT);
/* clear notifiers - note both ports need to be written with
something even though we are only clearing on one */
if (ap->port_no == 0) {

2
drivers/ata/sata_sil.c
View File

@ -305,7 +305,7 @@ static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed)
u32 tmp, dev_mode[2];
unsigned int i;
int rc;
rc = ata_do_set_mode(ap, r_failed);
if (rc)
return rc;