forked from luck/tmp_suning_uos_patched
libata: Trim trailing whitespace
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
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bc9a8a7eaa
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@ -132,7 +132,7 @@ config SATA_SIS
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depends on PCI
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depends on PCI
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select PATA_SIS
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select PATA_SIS
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help
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help
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This option enables support for SiS Serial ATA on
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This option enables support for SiS Serial ATA on
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SiS 964/965/966/180 and Parallel ATA on SiS 180.
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SiS 964/965/966/180 and Parallel ATA on SiS 180.
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The PATA support for SiS 180 requires additionally to
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The PATA support for SiS 180 requires additionally to
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enable the PATA_SIS driver in the config.
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enable the PATA_SIS driver in the config.
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@ -977,7 +977,7 @@ static u64 ata_hpa_resize(struct ata_device *dev)
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{
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{
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u64 sectors = dev->n_sectors;
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u64 sectors = dev->n_sectors;
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u64 hpa_sectors;
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u64 hpa_sectors;
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if (ata_id_has_lba48(dev->id))
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if (ata_id_has_lba48(dev->id))
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hpa_sectors = ata_read_native_max_address_ext(dev);
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hpa_sectors = ata_read_native_max_address_ext(dev);
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else
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else
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@ -1588,7 +1588,7 @@ unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
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* Check if the current speed of the device requires IORDY. Used
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* Check if the current speed of the device requires IORDY. Used
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* by various controllers for chip configuration.
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* by various controllers for chip configuration.
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*/
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*/
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unsigned int ata_pio_need_iordy(const struct ata_device *adev)
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unsigned int ata_pio_need_iordy(const struct ata_device *adev)
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{
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{
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/* Controller doesn't support IORDY. Probably a pointless check
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/* Controller doesn't support IORDY. Probably a pointless check
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@ -1611,7 +1611,7 @@ unsigned int ata_pio_need_iordy(const struct ata_device *adev)
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* Compute the highest mode possible if we are not using iordy. Return
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* Compute the highest mode possible if we are not using iordy. Return
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* -1 if no iordy mode is available.
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* -1 if no iordy mode is available.
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*/
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*/
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static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
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static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
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{
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{
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/* If we have no drive specific rule, then PIO 2 is non IORDY */
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/* If we have no drive specific rule, then PIO 2 is non IORDY */
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@ -2663,7 +2663,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
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t->active += (t->cycle - (t->active + t->recover)) / 2;
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t->active += (t->cycle - (t->active + t->recover)) / 2;
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t->recover = t->cycle - t->active;
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t->recover = t->cycle - t->active;
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}
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}
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/* In a few cases quantisation may produce enough errors to
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/* In a few cases quantisation may produce enough errors to
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leave t->cycle too low for the sum of active and recovery
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leave t->cycle too low for the sum of active and recovery
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if so we must correct this */
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if so we must correct this */
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@ -1009,7 +1009,7 @@ static unsigned int atapi_eh_request_sense(struct ata_queued_cmd *qc)
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sense_buf[0] = 0x70;
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sense_buf[0] = 0x70;
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sense_buf[2] = qc->result_tf.feature >> 4;
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sense_buf[2] = qc->result_tf.feature >> 4;
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/* some devices time out if garbage left in tf */
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/* some devices time out if garbage left in tf */
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ata_tf_init(dev, &tf);
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ata_tf_init(dev, &tf);
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memset(cdb, 0, ATAPI_CDB_LEN);
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memset(cdb, 0, ATAPI_CDB_LEN);
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@ -99,7 +99,7 @@ static int artop6260_pre_reset(struct ata_port *ap, unsigned long deadline)
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*
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*
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* Identify the cable type for the ARTOp interface in question
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* Identify the cable type for the ARTOp interface in question
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*/
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*/
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static int artop6260_cable_detect(struct ata_port *ap)
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static int artop6260_cable_detect(struct ata_port *ap)
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{
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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@ -107,7 +107,7 @@ static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
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pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
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pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
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} else {
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} else {
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/* Save the shared timings for channel, they will be loaded
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/* Save the shared timings for channel, they will be loaded
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by qc_issue_prot. Reloading the setup time is expensive
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by qc_issue_prot. Reloading the setup time is expensive
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so we keep a merged one loaded */
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so we keep a merged one loaded */
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pci_read_config_byte(pdev, ARTIM23, ®);
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pci_read_config_byte(pdev, ARTIM23, ®);
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reg &= 0x3F;
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reg &= 0x3F;
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@ -231,7 +231,7 @@ static void cmd640_hardware_init(struct pci_dev *pdev)
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pci_write_config_byte(pdev, CMDTIM, 0);
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pci_write_config_byte(pdev, CMDTIM, 0);
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/* 512 byte bursts (sector) */
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/* 512 byte bursts (sector) */
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pci_write_config_byte(pdev, BRST, 0x40);
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pci_write_config_byte(pdev, BRST, 0x40);
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/*
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/*
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* A reporter a long time ago
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* A reporter a long time ago
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* Had problems with the data fifo
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* Had problems with the data fifo
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* So don't run the risk
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* So don't run the risk
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@ -961,7 +961,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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u8 mcr1;
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u8 mcr1;
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u32 freq;
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u32 freq;
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int prefer_dpll = 1;
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int prefer_dpll = 1;
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unsigned long iobase = pci_resource_start(dev, 4);
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unsigned long iobase = pci_resource_start(dev, 4);
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const struct hpt_chip *chip_table;
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const struct hpt_chip *chip_table;
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@ -1055,7 +1055,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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*/
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*/
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pci_write_config_byte(dev, 0x5b, 0x23);
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pci_write_config_byte(dev, 0x5b, 0x23);
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/*
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/*
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* HighPoint does this for HPT372A.
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* HighPoint does this for HPT372A.
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* NOTE: This register is only writeable via I/O space.
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* NOTE: This register is only writeable via I/O space.
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@ -1088,7 +1088,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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* Turn the frequency check into a band and then find a timing
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* Turn the frequency check into a band and then find a timing
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* table to match it.
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* table to match it.
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*/
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*/
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clock_slot = hpt37x_clock_slot(freq, chip_table->base);
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clock_slot = hpt37x_clock_slot(freq, chip_table->base);
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if (chip_table->clocks[clock_slot] == NULL || prefer_dpll) {
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if (chip_table->clocks[clock_slot] == NULL || prefer_dpll) {
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/*
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/*
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@ -1099,11 +1099,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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*/
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*/
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unsigned int f_low, f_high;
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unsigned int f_low, f_high;
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int adjust;
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int adjust;
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clock_slot = 2;
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clock_slot = 2;
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if (port->udma_mask & 0xE0)
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if (port->udma_mask & 0xE0)
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clock_slot = 3;
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clock_slot = 3;
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f_low = (MHz[clock_slot] * chip_table->base) / 192;
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f_low = (MHz[clock_slot] * chip_table->base) / 192;
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f_high = f_low + 2;
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f_high = f_low + 2;
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@ -802,7 +802,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
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u16 status;
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u16 status;
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u32 gen_ctl;
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u32 gen_ctl;
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u32 notifier, notifier_error;
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u32 notifier, notifier_error;
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/* if ADMA is disabled, use standard ata interrupt handler */
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/* if ADMA is disabled, use standard ata interrupt handler */
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if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) {
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if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) {
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u8 irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804)
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u8 irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804)
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@ -963,7 +963,7 @@ static void nv_adma_irq_clear(struct ata_port *ap)
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/* clear ADMA status */
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/* clear ADMA status */
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writew(0xffff, mmio + NV_ADMA_STAT);
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writew(0xffff, mmio + NV_ADMA_STAT);
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/* clear notifiers - note both ports need to be written with
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/* clear notifiers - note both ports need to be written with
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something even though we are only clearing on one */
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something even though we are only clearing on one */
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if (ap->port_no == 0) {
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if (ap->port_no == 0) {
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@ -305,7 +305,7 @@ static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed)
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u32 tmp, dev_mode[2];
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u32 tmp, dev_mode[2];
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unsigned int i;
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unsigned int i;
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int rc;
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int rc;
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rc = ata_do_set_mode(ap, r_failed);
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rc = ata_do_set_mode(ap, r_failed);
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if (rc)
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if (rc)
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return rc;
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return rc;
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