forked from luck/tmp_suning_uos_patched
regmap: irq: add chip option mask_writeonly
Some irq controllers have writeonly/multipurpose register layouts. In those cases we read invalid data back. Here we add the option mask_writeonly as masking option. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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63c73b059c
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a71411dbf6
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@ -60,6 +60,16 @@ static void regmap_irq_lock(struct irq_data *data)
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mutex_lock(&d->lock);
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}
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static int regmap_irq_update_bits(struct regmap_irq_chip_data *d,
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unsigned int reg, unsigned int mask,
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unsigned int val)
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{
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if (d->chip->mask_writeonly)
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return regmap_write_bits(d->map, reg, mask, val);
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else
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return regmap_update_bits(d->map, reg, mask, val);
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}
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static void regmap_irq_sync_unlock(struct irq_data *data)
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{
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struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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@ -84,11 +94,11 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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reg = d->chip->mask_base +
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->chip->mask_invert) {
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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} else if (d->chip->unmask_base) {
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/* set mask with mask_base register */
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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if (ret < 0)
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dev_err(d->map->dev,
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@ -97,12 +107,12 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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unmask_offset = d->chip->unmask_base -
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d->chip->mask_base;
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/* clear mask with unmask_base register */
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ret = regmap_update_bits(d->map,
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ret = regmap_irq_update_bits(d,
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reg + unmask_offset,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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} else {
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i], d->mask_buf[i]);
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}
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if (ret != 0)
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@ -113,11 +123,11 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->wake_buf) {
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if (d->chip->wake_invert)
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i],
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~d->wake_buf[i]);
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else
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i],
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d->wake_buf[i]);
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if (ret != 0)
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@ -153,10 +163,10 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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reg = d->chip->type_base +
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(i * map->reg_stride * d->type_reg_stride);
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if (d->chip->type_invert)
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->type_buf_def[i], ~d->type_buf[i]);
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else
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ret = regmap_update_bits(d->map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->type_buf_def[i], d->type_buf[i]);
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if (ret != 0)
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dev_err(d->map->dev, "Failed to sync type in %x\n",
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@ -519,17 +529,17 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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reg = chip->mask_base +
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(i * map->reg_stride * d->irq_reg_stride);
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if (chip->mask_invert)
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf[i], ~d->mask_buf[i]);
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else if (d->chip->unmask_base) {
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unmask_offset = d->chip->unmask_base -
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d->chip->mask_base;
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ret = regmap_update_bits(d->map,
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ret = regmap_irq_update_bits(d,
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reg + unmask_offset,
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d->mask_buf[i],
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d->mask_buf[i]);
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} else
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf[i], d->mask_buf[i]);
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if (ret != 0) {
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dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
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@ -575,11 +585,11 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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(i * map->reg_stride * d->irq_reg_stride);
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if (chip->wake_invert)
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i],
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0);
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else
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->mask_buf_def[i],
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d->wake_buf[i]);
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if (ret != 0) {
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@ -603,10 +613,10 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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reg = chip->type_base +
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(i * map->reg_stride * d->type_reg_stride);
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if (chip->type_invert)
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->type_buf_def[i], 0xFF);
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else
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ret = regmap_update_bits(map, reg,
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ret = regmap_irq_update_bits(d, reg,
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d->type_buf_def[i], 0x0);
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if (ret != 0) {
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dev_err(map->dev,
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@ -884,6 +884,7 @@ struct regmap_irq {
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*
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* @status_base: Base status register address.
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* @mask_base: Base mask register address.
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* @mask_writeonly: Base mask register is write only.
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* @unmask_base: Base unmask register address. for chips who have
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* separate mask and unmask registers
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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@ -927,6 +928,7 @@ struct regmap_irq_chip {
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unsigned int wake_base;
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unsigned int type_base;
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unsigned int irq_reg_stride;
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bool mask_writeonly:1;
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bool init_ack_masked:1;
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bool mask_invert:1;
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bool use_ack:1;
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