forked from luck/tmp_suning_uos_patched
sh: Tidy CPU probing and fixup section annotations.
This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies up the unused return value, and stuffs it under __cpuinit in preparation for CPU hotplug. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -38,14 +38,10 @@ struct cache_info {
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* 2. those in the physical page number.
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*/
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unsigned int alias_mask;
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unsigned int n_aliases; /* Number of aliases */
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unsigned long flags;
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};
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int __init detect_cpu_and_cache_system(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_CACHE_H */
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@ -102,6 +102,8 @@ struct task_struct;
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extern struct pt_regs fake_swapper_regs;
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extern void cpu_probe(void);
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/* arch/sh/kernel/process.c */
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extern unsigned int xstate_size;
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extern void free_thread_xstate(struct task_struct *);
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@ -293,14 +293,14 @@ static inline void __init dsp_init(void) { }
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* subtype and initial configuration will all be done.
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*
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* Each processor family is still responsible for doing its own probing
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* and cache configuration in detect_cpu_and_cache_system().
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* and cache configuration in cpu_probe().
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*/
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asmlinkage void __init sh_cpu_init(void)
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{
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current_thread_info()->cpu = hard_smp_processor_id();
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/* First, probe the CPU */
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detect_cpu_and_cache_system();
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cpu_probe();
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if (current_cpu_data.type == CPU_SH_NONE)
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panic("Unknown CPU");
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@ -13,7 +13,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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int __init detect_cpu_and_cache_system(void)
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void __cpuinit cpu_probe(void)
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{
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#if defined(CONFIG_CPU_SUBTYPE_SH7619)
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boot_cpu_data.type = CPU_SH7619;
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@ -30,7 +30,4 @@ int __init detect_cpu_and_cache_system(void)
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boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
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boot_cpu_data.icache = boot_cpu_data.dcache;
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boot_cpu_data.family = CPU_FAMILY_SH2;
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return 0;
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}
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@ -13,7 +13,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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int __init detect_cpu_and_cache_system(void)
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void __cpuinit cpu_probe(void)
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{
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boot_cpu_data.family = CPU_FAMILY_SH2A;
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@ -51,6 +51,4 @@ int __init detect_cpu_and_cache_system(void)
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* on the cache info.
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*/
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boot_cpu_data.icache = boot_cpu_data.dcache;
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return 0;
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}
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@ -16,7 +16,7 @@
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#include <asm/cache.h>
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#include <asm/io.h>
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int detect_cpu_and_cache_system(void)
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void __cpuinit cpu_probe(void)
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{
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unsigned long addr0, addr1, data0, data1, data2, data3;
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@ -108,6 +108,4 @@ int detect_cpu_and_cache_system(void)
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boot_cpu_data.icache = boot_cpu_data.dcache;
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boot_cpu_data.family = CPU_FAMILY_SH3;
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return 0;
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}
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@ -15,7 +15,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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int __init detect_cpu_and_cache_system(void)
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void __cpuinit cpu_probe(void)
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{
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unsigned long pvr, prr, cvr;
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unsigned long size;
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@ -251,6 +251,4 @@ int __init detect_cpu_and_cache_system(void)
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boot_cpu_data.scache.linesz);
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}
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}
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return 0;
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}
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@ -17,7 +17,7 @@
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#include <asm/cache.h>
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#include <asm/tlb.h>
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int __init detect_cpu_and_cache_system(void)
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void __cpuinit cpu_probe(void)
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{
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unsigned long long cir;
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@ -72,6 +72,4 @@ int __init detect_cpu_and_cache_system(void)
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/* Setup some I/D TLB defaults */
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sh64_tlb_init();
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return 0;
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}
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