AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Blackfin arch: use the new bfin_addr_dcachable() function

Browse Source 
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Mike Frysinger 2008-10-16 23:25:34 +08:00 committed by Bryan Wu
parent 9bebeff98e
commit a92946bc6a
1 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
View File

@ -21,6 +21,7 @@
#include <linux/mm.h> #include <linux/mm.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <asm/cplbinit.h> #include <asm/cplbinit.h>
#include <asm/mmu_context.h> #include <asm/mmu_context.h>
@ -144,9 +145,7 @@ static noinline int dcplb_miss(void)
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
#ifdef CONFIG_BFIN_DCACHE #ifdef CONFIG_BFIN_DCACHE
if (addr < _ramend - DMA_UNCACHED_REGION || if (bfin_addr_dcachable(addr)) {
(reserved_mem_dcache_on && addr >= _ramend &&
addr < physical_mem_end)) {
d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
#ifdef CONFIG_BFIN_WT #ifdef CONFIG_BFIN_WT
d_data |= CPLB_L1_AOW | CPLB_WT; d_data |= CPLB_L1_AOW | CPLB_WT;