forked from luck/tmp_suning_uos_patched
Merge branch 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] 85xx: Enable CONFIG_SERIAL_8250_SHARE_IRQ [POWERPC] Select u-image as default image for Linkstation [POWERPC] 83xx: Minor fixes for 834x_mds USB setup code [POWERPC] Fix warning in powermac pci.c [POWERPC] Fix warning in powermac feature.c [POWERPC] Fix warning in prom_parse.c of_irq_map_oldworld() [POWERPC] Celleb: bug fix caused by not casting pointer types [POWERPC] Add missing newline in xmon help output [POWERPC] No DEEPNAP on 970MP 1.0
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commit
a967e127d0
@ -225,6 +225,22 @@ static struct cpu_spec cpu_specs[] = {
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
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.pvr_mask = 0xffffffff,
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.pvr_value = 0x00440100,
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.cpu_name = "PPC970MP",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.cpu_setup = __setup_cpu_ppc970,
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.cpu_restore = __restore_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970MP",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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},
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{ /* PPC970MP */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00440000,
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@ -916,7 +916,7 @@ EXPORT_SYMBOL_GPL(of_irq_map_raw);
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static int of_irq_map_oldworld(struct device_node *device, int index,
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struct of_irq *out_irq)
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{
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const u32 *ints;
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const u32 *ints = NULL;
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int intlen;
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/*
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@ -55,9 +55,9 @@ static int mpc834x_usb_cfg(void)
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struct device_node *np = NULL;
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int port0_is_dr = 0;
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if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL)
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if ((np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr")) != NULL)
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port0_is_dr = 1;
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if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL){
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if ((np = of_find_compatible_node(NULL, "usb", "fsl-usb2-mph")) != NULL){
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if (port0_is_dr) {
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printk(KERN_WARNING
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"There is only one USB port on PB board! \n");
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@ -103,8 +103,8 @@ static int mpc834x_usb_cfg(void)
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return -1;
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/*
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* if MDS board is plug into PIB board,
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* force to use the PHY on MDS board
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* if Processor Board is plugged into PIB board,
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* force to use the PHY on Processor Board
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*/
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bcsr5 = in_8(bcsr_regs + 5);
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if (!(bcsr5 & BCSR5_INT_USB))
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@ -47,6 +47,7 @@ config MPC85xx
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bool
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select PPC_UDBG_16550
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select PPC_INDIRECT_PCI
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select SERIAL_8250_SHARE_IRQ if SERIAL_8250
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default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC85xx_MDS
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config PPC_INDIRECT_PCI_BE
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@ -43,11 +43,34 @@
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#define iob() __asm__ __volatile__("eieio; sync":::"memory")
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static inline volatile void __iomem *celleb_epci_get_epci_base(
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struct pci_controller *hose)
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{
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/*
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* Note:
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* Celleb epci uses cfg_addr as a base address for
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* epci control registers.
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*/
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return hose->cfg_addr;
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}
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static inline volatile void __iomem *celleb_epci_get_epci_cfg(
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struct pci_controller *hose)
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{
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/*
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* Note:
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* Celleb epci uses cfg_data as a base address for
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* configuration area for epci devices.
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*/
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return hose->cfg_data;
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}
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#if 0 /* test code for epci dummy read */
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static void celleb_epci_dummy_read(struct pci_dev *dev)
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{
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void __iomem *epci_base;
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volatile void __iomem *epci_base;
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struct device_node *node;
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struct pci_controller *hose;
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u32 val;
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@ -58,7 +81,7 @@ static void celleb_epci_dummy_read(struct pci_dev *dev)
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if (!hose)
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return;
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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val = in_be32(epci_base + SCC_EPCI_WATRP);
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iosync();
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@ -70,19 +93,20 @@ static void celleb_epci_dummy_read(struct pci_dev *dev)
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static inline void clear_and_disable_master_abort_interrupt(
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struct pci_controller *hose)
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{
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void __iomem *addr;
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addr = hose->cfg_addr + PCI_COMMAND;
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out_be32(addr, in_be32(addr) | (PCI_STATUS_REC_MASTER_ABORT << 16));
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volatile void __iomem *epci_base, *reg;
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epci_base = celleb_epci_get_epci_base(hose);
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reg = epci_base + PCI_COMMAND;
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out_be32(reg, in_be32(reg) | (PCI_STATUS_REC_MASTER_ABORT << 16));
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}
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static int celleb_epci_check_abort(struct pci_controller *hose,
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void __iomem *addr)
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volatile void __iomem *addr)
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{
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void __iomem *reg, *epci_base;
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volatile void __iomem *reg, *epci_base;
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u32 val;
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iob();
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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reg = epci_base + PCI_COMMAND;
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val = in_be32(reg);
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@ -108,20 +132,21 @@ static int celleb_epci_check_abort(struct pci_controller *hose,
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return PCIBIOS_SUCCESSFUL;
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}
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static void __iomem *celleb_epci_make_config_addr(struct pci_controller *hose,
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static volatile void __iomem *celleb_epci_make_config_addr(
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struct pci_controller *hose,
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unsigned int devfn, int where)
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{
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void __iomem *addr;
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volatile void __iomem *addr;
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struct pci_bus *bus = hose->bus;
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if (bus->self)
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addr = hose->cfg_data +
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addr = celleb_epci_get_epci_cfg(hose) +
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(((bus->number & 0xff) << 16)
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| ((devfn & 0xff) << 8)
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| (where & 0xff)
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| 0x01000000);
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else
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addr = hose->cfg_data +
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addr = celleb_epci_get_epci_cfg(hose) +
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(((devfn & 0xff) << 8) | (where & 0xff));
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pr_debug("EPCI: config_addr = 0x%p\n", addr);
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@ -132,7 +157,7 @@ static void __iomem *celleb_epci_make_config_addr(struct pci_controller *hose,
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static int celleb_epci_read_config(struct pci_bus *bus,
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unsigned int devfn, int where, int size, u32 * val)
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{
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void __iomem *addr;
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volatile void __iomem *epci_base, *addr;
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struct device_node *node;
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struct pci_controller *hose;
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@ -142,13 +167,14 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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node = (struct device_node *)bus->sysdata;
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hose = pci_find_hose_for_OF_device(node);
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if (!hose->cfg_data)
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if (!celleb_epci_get_epci_cfg(hose))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (bus->number == hose->first_busno && devfn == 0) {
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/* EPCI controller self */
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addr = hose->cfg_addr + where;
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epci_base = celleb_epci_get_epci_base(hose);
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addr = epci_base + where;
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switch (size) {
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case 1:
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@ -185,7 +211,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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}
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pr_debug("EPCI: "
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"addr=0x%lx, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n",
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"addr=0x%p, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n",
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addr, devfn, where, size, *val);
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return celleb_epci_check_abort(hose, NULL);
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@ -194,7 +220,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
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static int celleb_epci_write_config(struct pci_bus *bus,
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unsigned int devfn, int where, int size, u32 val)
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{
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void __iomem *addr;
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volatile void __iomem *epci_base, *addr;
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struct device_node *node;
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struct pci_controller *hose;
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@ -204,13 +230,15 @@ static int celleb_epci_write_config(struct pci_bus *bus,
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node = (struct device_node *)bus->sysdata;
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hose = pci_find_hose_for_OF_device(node);
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if (!hose->cfg_data)
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if (!celleb_epci_get_epci_cfg(hose))
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (bus->number == hose->first_busno && devfn == 0) {
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/* EPCI controller self */
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addr = hose->cfg_addr + where;
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epci_base = celleb_epci_get_epci_base(hose);
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addr = epci_base + where;
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switch (size) {
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case 1:
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@ -258,10 +286,10 @@ struct pci_ops celleb_epci_ops = {
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static int __devinit celleb_epci_init(struct pci_controller *hose)
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{
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u32 val;
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void __iomem *reg, *epci_base;
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volatile void __iomem *reg, *epci_base;
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int hwres = 0;
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epci_base = hose->cfg_addr;
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epci_base = celleb_epci_get_epci_base(hose);
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/* PCI core reset(Internal bus and PCI clock) */
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reg = epci_base + SCC_EPCI_CKCTRL;
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@ -382,6 +410,18 @@ int __devinit celleb_setup_epci(struct device_node *node,
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pr_debug("PCI: celleb_setup_epci()\n");
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/*
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* Note:
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* Celleb epci uses cfg_addr and cfg_data member of
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* pci_controller structure in irregular way.
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*
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* cfg_addr is used to map for control registers of
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* celleb epci.
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*
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* cfg_data is used for configuration area of devices
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* on Celleb epci buses.
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*/
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if (of_address_to_resource(node, 0, &r))
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goto error;
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hose->cfg_addr = ioremap(r.start, (r.end - r.start + 1));
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@ -79,6 +79,7 @@ config LINKSTATION
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select MPIC
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select FSL_SOC
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select PPC_UDBG_16550 if SERIAL_8250
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select DEFAULT_UIMAGE
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help
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Select LINKSTATION if configuring for one of PPC- (MPC8241)
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based NAS systems from Buffalo Technology. So far only
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@ -810,6 +810,7 @@ core99_ata100_enable(struct device_node *node, long value)
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unsigned long flags;
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struct pci_dev *pdev = NULL;
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u8 pbus, pid;
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int rc;
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if (uninorth_rev < 0x24)
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return -ENODEV;
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@ -828,7 +829,9 @@ core99_ata100_enable(struct device_node *node, long value)
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pdev = pci_find_slot(pbus, pid);
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if (pdev == NULL)
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return 0;
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pci_enable_device(pdev);
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rc = pci_enable_device(pdev);
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if (rc)
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return rc;
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pci_set_master(pdev);
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}
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return 0;
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@ -1191,8 +1191,11 @@ void __init pmac_pcibios_after_init(void)
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* -- BenH
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*/
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for_each_pci_dev(dev) {
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if ((dev->class >> 16) == PCI_BASE_CLASS_STORAGE)
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pci_enable_device(dev);
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if ((dev->class >> 16) != PCI_BASE_CLASS_STORAGE)
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continue;
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if (pci_enable_device(dev))
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printk(KERN_WARNING
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"pci: Failed to enable %s\n", pci_name(dev));
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}
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#endif /* CONFIG_BLK_DEV_IDE */
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@ -218,7 +218,7 @@ Commands:\n\
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" ss stop execution on all spus\n\
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sr restore execution on stopped spus\n\
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sf # dump spu fields for spu # (in hex)\n\
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sd # dump spu local store for spu # (in hex)\
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sd # dump spu local store for spu # (in hex)\n\
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sdi # disassemble spu local store for spu # (in hex)\n"
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#endif
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" S print special registers\n\
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