forked from luck/tmp_suning_uos_patched
[PATCH] powerpc: Merge elf.h
ppc/ppc64: Merge elf.h into include/asm-powerpc Merge elf.h into a single include file for 32 and 64-bit ppc platforms. This patch has been tested on 32-bit and built on 64-bit platforms. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Becky Bruce
Paul Mackerras
parent
25433b123c
commit
a99eb2ef45
@ -1,5 +1,5 @@
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#ifndef __PPC64_ELF_H
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#define __PPC64_ELF_H
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#ifndef _ASM_POWERPC_ELF_H
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#define _ASM_POWERPC_ELF_H
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#include <asm/types.h>
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#include <asm/ptrace.h>
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@ -76,7 +76,7 @@
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#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
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#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
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/* Keep this the last entry. */
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/* keep this the last entry. */
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#define R_PPC_NUM 95
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/*
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@ -91,8 +91,6 @@
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#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
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#define ELF_NFPREG 33 /* includes fpscr */
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#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
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#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
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typedef unsigned long elf_greg_t64;
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typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
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@ -101,8 +99,21 @@ typedef unsigned int elf_greg_t32;
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typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
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/*
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* These are used to set parameters in the core dumps.
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* ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
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*/
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#ifdef __powerpc64__
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# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
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# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
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# define ELF_GREG_TYPE elf_greg_t64
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#else
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# define ELF_NEVRREG 34 /* includes acc (as 2) */
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# define ELF_NVRREG 33 /* includes vscr */
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# define ELF_GREG_TYPE elf_greg_t32
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# define ELF_ARCH EM_PPC
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# define ELF_CLASS ELFCLASS32
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# define ELF_DATA ELFDATA2MSB
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#endif /* __powerpc64__ */
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#ifndef ELF_ARCH
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# define ELF_ARCH EM_PPC64
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# define ELF_CLASS ELFCLASS64
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@ -115,8 +126,9 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
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typedef elf_greg_t32 elf_greg_t;
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typedef elf_gregset_t32 elf_gregset_t;
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# define elf_addr_t u32
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#endif
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#endif /* ELF_ARCH */
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/* Floating point registers */
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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@ -126,7 +138,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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* The entry with index 32 contains the vscr as the last word (offset 12)
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* within the quadword. This allows the vscr to be stored as either a
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* quadword (since it must be copied via a vector register to/from storage)
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* or as a word. The entry with index 33 contains the vrsave as the first
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* or as a word.
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*
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* 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
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* word (offset 0) within the quadword.
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*
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* This definition of the VMX state is compatible with the current PPC32
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@ -139,7 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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*/
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typedef __vector128 elf_vrreg_t;
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typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
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#ifdef __powerpc64__
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typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
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#endif
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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@ -159,26 +175,30 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
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#ifdef __KERNEL__
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/* Common routine for both 32-bit and 64-bit processes */
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static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs,
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static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
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struct pt_regs *regs)
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{
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int i;
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int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64);
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int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
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if (gprs > ELF_NGREG)
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gprs = ELF_NGREG;
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for (i=0; i < gprs; i++)
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elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i];
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elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
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memset((char *)(elf_regs) + sizeof(struct pt_regs), 0, \
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sizeof(elf_gregset_t) - sizeof(struct pt_regs));
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}
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#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs);
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#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
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static inline int dump_task_regs(struct task_struct *tsk,
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elf_gregset_t *elf_regs)
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{
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struct pt_regs *regs = tsk->thread.regs;
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if (regs)
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ppc64_elf_core_copy_regs(*elf_regs, regs);
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ppc_elf_core_copy_regs(*elf_regs, regs);
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return 1;
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}
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@ -187,15 +207,21 @@ static inline int dump_task_regs(struct task_struct *tsk,
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extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
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#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
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/* XXX Should we define the XFPREGS using altivec ??? */
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#endif /* __KERNEL__ */
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#endif
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/* This yields a mask that user programs can use to figure out what
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/* ELF_HWCAP yields a mask that user programs can use to figure out what
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instruction set this cpu supports. This could be done in userspace,
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but it's not easy, and we've already done it here. */
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#define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
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#ifdef __powerpc64__
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# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
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# define ELF_PLAT_INIT(_r, load_addr) do { \
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memset(_r->gpr, 0, sizeof(_r->gpr)); \
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_r->ctr = _r->link = _r->xer = _r->ccr = 0; \
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_r->gpr[2] = load_addr; \
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} while (0)
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#else
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# define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
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#endif /* __powerpc64__ */
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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@ -206,14 +232,10 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
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#define ELF_PLATFORM (NULL)
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#define ELF_PLAT_INIT(_r, load_addr) do { \
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memset(_r->gpr, 0, sizeof(_r->gpr)); \
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_r->ctr = _r->link = _r->xer = _r->ccr = 0; \
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_r->gpr[2] = load_addr; \
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} while (0)
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#ifdef __KERNEL__
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#define SET_PERSONALITY(ex, ibcs2) \
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#ifdef __powerpc64__
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# define SET_PERSONALITY(ex, ibcs2) \
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do { \
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unsigned long new_flags = 0; \
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if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
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@ -226,7 +248,6 @@ do { \
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if (personality(current->personality) != PER_LINUX32) \
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set_personality(PER_LINUX); \
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} while (0)
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/*
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* An executable for which elf_read_implies_exec() returns TRUE will
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* have the READ_IMPLIES_EXEC personality flag set automatically. This
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@ -234,19 +255,26 @@ do { \
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* the 64bit ABI has never had these issues dont enable the workaround
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* even if we have an executable stack.
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*/
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#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
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# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
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(exec_stk != EXSTACK_DISABLE_X) : 0)
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#else
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# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
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#endif /* __powerpc64__ */
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#endif
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#endif /* __KERNEL__ */
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extern int dcache_bsize;
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extern int icache_bsize;
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extern int ucache_bsize;
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/* We do have an arch_setup_additional_pages for vDSO matters */
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#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
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#ifdef __powerpc64__
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struct linux_binprm;
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#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
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extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
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#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
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#else
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#define VDSO_AUX_ENT(a,b)
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#endif /* __powerpc64__ */
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/*
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* The requirements here are:
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@ -266,9 +294,8 @@ do { \
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NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
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NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
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NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
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/* vDSO base */ \
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NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \
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} while (0)
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VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \
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} while (0)
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/* PowerPC64 relocations defined by the ABIs */
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#define R_PPC64_NONE R_PPC_NONE
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@ -385,4 +412,4 @@ do { \
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/* Keep this the last entry. */
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#define R_PPC64_NUM 107
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#endif /* __PPC64_ELF_H */
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#endif /* _ASM_POWERPC_ELF_H */
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@ -1,151 +0,0 @@
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#ifndef __PPC_ELF_H
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#define __PPC_ELF_H
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/*
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* ELF register definitions..
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*/
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#include <asm/types.h>
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#include <asm/ptrace.h>
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#include <asm/cputable.h>
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#include <asm/auxvec.h>
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/* PowerPC relocations defined by the ABIs */
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#define R_PPC_NONE 0
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#define R_PPC_ADDR32 1 /* 32bit absolute address */
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#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
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#define R_PPC_ADDR16 3 /* 16bit absolute address */
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#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
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#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
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#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
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#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
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#define R_PPC_ADDR14_BRTAKEN 8
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#define R_PPC_ADDR14_BRNTAKEN 9
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#define R_PPC_REL24 10 /* PC relative 26 bit */
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#define R_PPC_REL14 11 /* PC relative 16 bit */
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#define R_PPC_REL14_BRTAKEN 12
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#define R_PPC_REL14_BRNTAKEN 13
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#define R_PPC_GOT16 14
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#define R_PPC_GOT16_LO 15
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#define R_PPC_GOT16_HI 16
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#define R_PPC_GOT16_HA 17
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#define R_PPC_PLTREL24 18
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#define R_PPC_COPY 19
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#define R_PPC_GLOB_DAT 20
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#define R_PPC_JMP_SLOT 21
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#define R_PPC_RELATIVE 22
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#define R_PPC_LOCAL24PC 23
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#define R_PPC_UADDR32 24
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#define R_PPC_UADDR16 25
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#define R_PPC_REL32 26
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#define R_PPC_PLT32 27
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#define R_PPC_PLTREL32 28
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#define R_PPC_PLT16_LO 29
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#define R_PPC_PLT16_HI 30
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#define R_PPC_PLT16_HA 31
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#define R_PPC_SDAREL16 32
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#define R_PPC_SECTOFF 33
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#define R_PPC_SECTOFF_LO 34
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#define R_PPC_SECTOFF_HI 35
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#define R_PPC_SECTOFF_HA 36
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/* Keep this the last entry. */
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#define R_PPC_NUM 37
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#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
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#define ELF_NFPREG 33 /* includes fpscr */
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#define ELF_NVRREG 33 /* includes vscr */
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#define ELF_NEVRREG 34 /* includes acc (as 2) */
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_ARCH EM_PPC
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#define ELF_CLASS ELFCLASS32
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#define ELF_DATA ELFDATA2MSB
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/* General registers */
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typedef unsigned long elf_greg_t;
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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/* Floating point registers */
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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/* Altivec registers */
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typedef __vector128 elf_vrreg_t;
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typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
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#ifdef __KERNEL__
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struct task_struct;
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE (0x08000000)
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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#define ELF_CORE_COPY_REGS(gregs, regs) \
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memcpy((gregs), (regs), sizeof(struct pt_regs)); \
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memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
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sizeof(elf_gregset_t) - sizeof(struct pt_regs));
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#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
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((t)->thread.regs? \
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({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
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extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
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#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
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/* This yields a mask that user programs can use to figure out what
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instruction set this cpu supports. This could be done in userspace,
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but it's not easy, and we've already done it here. */
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#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo.
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For the moment, we have only optimizations for the Intel generations,
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but that could change... */
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#define ELF_PLATFORM (NULL)
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#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
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extern int dcache_bsize;
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extern int icache_bsize;
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extern int ucache_bsize;
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/*
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* The requirements here are:
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* - keep the final alignment of sp (sp & 0xf)
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* - make sure the 32-bit value at the first 16 byte aligned position of
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* AUXV is greater than 16 for glibc compatibility.
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* AT_IGNOREPPC is used for that.
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* - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
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* even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
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*/
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#define ARCH_DLINFO \
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do { \
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/* Handle glibc compatibility. */ \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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/* Cache size items */ \
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NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
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NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
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NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
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} while (0)
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#endif /* __KERNEL__ */
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#endif
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