forked from luck/tmp_suning_uos_patched
ahci: force CAP_NCQ for earlier NV MCPs
Along with MCP65, MCP67 and 73 also don't set CAP_NCQ. Force it. Reported by zaceni@yandex.ru on bko#13014 and confirmed by Peer Chen. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: NightFox <zaceni2@yandex.ru> Cc: Peer Chen <pchen@nvidia.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -114,6 +114,7 @@ enum {
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board_ahci_sb700 = 5, /* for SB700 and SB800 */
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board_ahci_mcp65 = 6,
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board_ahci_nopmp = 7,
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board_ahci_yesncq = 8,
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/* global controller registers */
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HOST_CAP = 0x00, /* host capabilities */
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@ -469,6 +470,14 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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/* board_ahci_yesncq */
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{
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AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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};
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static const struct pci_device_id ahci_pci_tbl[] = {
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@ -535,30 +544,30 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */
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{ PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */
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{ PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */
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{ PCI_VDEVICE(NVIDIA, 0x0550), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0551), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0552), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0553), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0554), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0555), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0556), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0557), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0558), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0559), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055a), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055b), board_ahci }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci }, /* MCP77 */
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{ PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci }, /* MCP77 */
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{ PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci }, /* MCP77 */
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