forked from luck/tmp_suning_uos_patched
Merge branch 'dev/cleanup-clocks' into for-next
This commit is contained in:
commit
ab10f1dd91
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@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
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return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
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}
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "nand",
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.id = -1,
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@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = {
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void __init s3c64xx_register_clocks(unsigned long xtal,
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unsigned armclk_divlimit)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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armclk_mask = armclk_divlimit;
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s3c24xx_register_baseclocks(xtal);
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@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
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clk_pclkd1.rate = pclkd1;
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}
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "pdma",
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.id = -1,
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@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = {
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void __init s5p6442_register_clocks(void)
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{
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struct clk *clkptr;
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int i, ret;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkptr = init_clocks_disable;
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for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
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ret = s3c24xx_register_clock(clkptr);
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if (ret < 0) {
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printk(KERN_ERR "Fail to register clock %s (%d)\n",
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clkptr->name, ret);
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} else
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(clkptr->enable)(clkptr, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = {
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* recommended to keep the following clocks disabled until the driver requests
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* for enabling the clock.
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*/
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "nand",
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.id = -1,
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@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = {
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void __init s5p6440_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = {
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* recommended to keep the following clocks disabled until the driver requests
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* for enabling the clock.
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*/
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "usbhost",
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.id = -1,
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@ -651,8 +651,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void)
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void __init s5p6450_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
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@ -661,16 +659,8 @@ void __init s5p6450_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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@ -396,7 +396,7 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable)
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* recommended to keep the following clocks disabled until the driver requests
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* for enabling the clock.
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*/
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "cssys",
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.id = -1,
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@ -1381,8 +1381,6 @@ static struct clk *clks[] __initdata = {
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void __init s5pc100_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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@ -1393,16 +1391,8 @@ void __init s5pc100_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = {
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.get_rate = s5pv210_clk_fout_apll_get_rate,
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};
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "pdma",
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.id = 0,
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@ -1226,13 +1226,9 @@ static struct clk *clks[] __initdata = {
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void __init s5pv210_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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if (ret > 0)
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printk(KERN_ERR "Failed to register %u clocks\n", ret);
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
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s3c_register_clksrc(sysclks[ptr], 1);
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@ -1240,15 +1236,8 @@ void __init s5pv210_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = {
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.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
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};
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "timers",
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.id = -1,
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@ -1105,13 +1105,9 @@ static struct clk *clks[] __initdata = {
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void __init s5pv310_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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if (ret > 0)
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printk(KERN_ERR "Failed to register %u clocks\n", ret);
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
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s3c_register_clksrc(sysclks[ptr], 1);
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@ -1119,15 +1115,8 @@ void __init s5pv310_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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