forked from luck/tmp_suning_uos_patched
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas into fixes
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: ARM: shmobile: r8a7779: Route all interrupts to ARM ARM: shmobile: kzm9d: use late init machine hook ARM: shmobile: kzm9g: use late init machine hook ARM: mach-shmobile: armadillo800eva: Use late init machine hook ARM: mach-shmobile: add missing GPIO IRQ configuration on mackerel ARM: mach-shmobile: Fix build when SMP is enabled and EMEV2 is not enabled ARM: shmobile: sh7372: bugfix: chclr_offset base ARM: shmobile: sh73a0: bugfix: SY-DMAC number
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commit
acf6a7ecbd
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@ -779,6 +779,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
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.init_irq = r8a7740_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = eva_init,
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.init_late = shmobile_init_late,
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.timer = &shmobile_timer,
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.dt_compat = eva_boards_compat_dt,
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MACHINE_END
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@ -80,6 +80,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
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.init_irq = emev2_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = kzm9d_add_standard_devices,
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.init_late = shmobile_init_late,
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.timer = &shmobile_timer,
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.dt_compat = kzm9d_boards_compat_dt,
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MACHINE_END
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@ -455,6 +455,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
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.init_irq = sh73a0_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = kzm_init,
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.init_late = shmobile_init_late,
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.timer = &shmobile_timer,
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.dt_compat = kzm9g_boards_compat_dt,
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MACHINE_END
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@ -1512,6 +1512,9 @@ static void __init mackerel_init(void)
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gpio_request(GPIO_FN_SDHID0_1, NULL);
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gpio_request(GPIO_FN_SDHID0_0, NULL);
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/* SDHI0 PORT172 card-detect IRQ26 */
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gpio_request(GPIO_FN_IRQ26_172, NULL);
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#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
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/* enable SDHI1 */
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gpio_request(GPIO_FN_SDHICMD1, NULL);
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@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
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enum { MSTP001,
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MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
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MSTP219,
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MSTP219, MSTP218,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
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MSTP331, MSTP329, MSTP325, MSTP323,
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MSTP314, MSTP313, MSTP312, MSTP311,
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MSTP303, MSTP302, MSTP301, MSTP300,
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MSTP411, MSTP410, MSTP403,
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@ -497,6 +497,7 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
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[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
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[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
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[MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
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[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
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[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
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[MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
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@ -508,7 +509,6 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
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[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
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[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
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[MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
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[MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
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[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
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[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
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@ -552,6 +552,7 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
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CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
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CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
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CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
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CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
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CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
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@ -563,7 +564,6 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
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CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
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CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
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CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
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CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
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CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
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@ -35,6 +35,9 @@
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#define INT2SMSKCR3 0xfe7822ac
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#define INT2SMSKCR4 0xfe7822b0
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#define INT2NTSR0 0xfe700060
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#define INT2NTSR1 0xfe700064
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static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
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{
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return 0; /* always allow wakeup */
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@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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gic_arch_extn.irq_set_wake = r8a7779_set_wake;
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/* route all interrupts to ARM */
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__raw_writel(0xffffffff, INT2NTSR0);
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__raw_writel(0x3fffffff, INT2NTSR1);
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/* unmask all known interrupts in INTCS2 */
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__raw_writel(0xfffffff0, INT2SMSKCR0);
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__raw_writel(0xfff7ffff, INT2SMSKCR1);
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@ -25,7 +25,12 @@
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#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
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of_machine_is_compatible("renesas,sh73a0"))
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#define is_r8a7779() machine_is_marzen()
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#ifdef CONFIG_ARCH_EMEV2
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#define is_emev2() of_machine_is_compatible("renesas,emev2")
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#else
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#define is_emev2() (0)
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#endif
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static unsigned int __init shmobile_smp_get_core_count(void)
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{
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@ -484,7 +484,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
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},
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};
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#define SH7372_CHCLR 0x220
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#define SH7372_CHCLR (0x220 - 0x20)
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static const struct sh_dmae_channel sh7372_dmae_channels[] = {
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{
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