forked from luck/tmp_suning_uos_patched
x86, AMD IOMMU: add functions for programming IOMMU MMIO space
This patch adds the functions required to programm the IOMMU with the MMIO space. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: Sebastian.Biemueller@amd.com Cc: robert.richter@amd.com Cc: joro@8bytes.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -117,6 +117,66 @@ static u32 dev_table_size;
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static u32 alias_table_size;
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static u32 rlookup_table_size;
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static void __init iommu_set_exclusion_range(struct amd_iommu *iommu)
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{
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u64 start = iommu->exclusion_start & PAGE_MASK;
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u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
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u64 entry;
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if (!iommu->exclusion_start)
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return;
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entry = start | MMIO_EXCL_ENABLE_MASK;
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memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET,
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&entry, sizeof(entry));
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entry = limit;
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memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET,
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&entry, sizeof(entry));
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}
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static void __init iommu_set_device_table(struct amd_iommu *iommu)
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{
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u32 entry;
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BUG_ON(iommu->mmio_base == NULL);
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entry = virt_to_phys(amd_iommu_dev_table);
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entry |= (dev_table_size >> 12) - 1;
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memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET,
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&entry, sizeof(entry));
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}
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static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
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{
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u32 ctrl;
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ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
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ctrl |= (1 << bit);
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writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
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}
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static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
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{
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u32 ctrl;
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ctrl = (u64)readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
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ctrl &= ~(1 << bit);
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writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
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}
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void __init iommu_enable(struct amd_iommu *iommu)
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{
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u32 ctrl;
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printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at ");
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print_devid(iommu->devid, 0);
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printk(" cap 0x%hx\n", iommu->cap_ptr);
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iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
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ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
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}
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static u8 * __init iommu_map_mmio_space(u64 address)
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{
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u8 *ret;
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