forked from luck/tmp_suning_uos_patched
ASoC: pxa2xx-i2s: Proper hw initialization
Make sure we are in a know good state at end of probe : Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled (SACR0_RST enables REC and RPL). Resetting loses current settings so remove reset from stream startup. Now reset occurs only at probe. Signed-off-by: Karl Beldan <karl.beldan@mobile-devices.fr> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -106,10 +106,8 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
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if (IS_ERR(clk_i2s))
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return PTR_ERR(clk_i2s);
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if (!cpu_dai->active) {
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SACR0 |= SACR0_RST;
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if (!cpu_dai->active)
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SACR0 = 0;
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}
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return 0;
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}
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@ -347,6 +345,19 @@ static int pxa2xx_i2s_probe(struct platform_device *dev)
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if (ret != 0)
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clk_put(clk_i2s);
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/*
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* PXA Developer's Manual:
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* If SACR0[ENB] is toggled in the middle of a normal operation,
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* the SACR0[RST] bit must also be set and cleared to reset all
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* I2S controller registers.
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*/
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SACR0 = SACR0_RST;
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SACR0 = 0;
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/* Make sure RPL and REC are disabled */
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SACR1 = SACR1_DRPL | SACR1_DREC;
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/* Along with FIFO servicing */
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SAIMR &= ~(SAIMR_RFS | SAIMR_TFS);
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return ret;
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}
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