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drm: fix all sparse warning on 32-bit x86

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Finally cleaned up the sparse warnings for the drm.

Signed-off-by: Dave Airlie <airlied@linux.ie>
This commit is contained in:
Dave Airlie 2005-09-30 18:37:36 +10:00 committed by Dave Airlie
parent 689b9d74b1
commit b3a8363989
22 changed files with 75 additions and 73 deletions
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6
drivers/char/drm/drm_bufs.c
View File

@ -117,9 +117,9 @@ static __inline__ unsigned int HandleID(unsigned long lhandle,
* type. Adds the map to the map list drm_device::maplist. Adds MTRR's where
* applicable and if supported by the kernel.
*/
int drm_addmap_core(drm_device_t * dev, unsigned int offset,
unsigned int size, drm_map_type_t type,
drm_map_flags_t flags, drm_map_list_t ** maplist)
static int drm_addmap_core(drm_device_t * dev, unsigned int offset,
unsigned int size, drm_map_type_t type,
drm_map_flags_t flags, drm_map_list_t ** maplist)
{
drm_map_t *map;
drm_map_list_t *list;

4
drivers/char/drm/drm_context.c
View File

@ -232,7 +232,7 @@ int drm_getsareactx(struct inode *inode, struct file *filp,
map = dev->context_sareas[request.ctx_id];
up(&dev->struct_sem);
request.handle = 0;
request.handle = NULL;
list_for_each_entry(_entry, &dev->maplist->head, head) {
if (_entry->map == map) {
request.handle =
@ -240,7 +240,7 @@ int drm_getsareactx(struct inode *inode, struct file *filp,
break;
}
}
if (request.handle == 0)
if (request.handle == NULL)
return -EINVAL;
if (copy_to_user(argp, &request, sizeof(request)))

3
drivers/char/drm/i810_drv.c
View File

@ -74,9 +74,6 @@ static struct pci_device_id pciidlist[] = {
i810_PCI_IDS
};
extern drm_ioctl_desc_t i810_ioctls[];
extern int i810_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |

3
drivers/char/drm/i810_drv.h
View File

@ -121,6 +121,9 @@ extern void i810_driver_pretakedown(drm_device_t * dev);
extern void i810_driver_prerelease(drm_device_t * dev, DRMFILE filp);
extern int i810_driver_device_is_agp(drm_device_t * dev);
extern drm_ioctl_desc_t i810_ioctls[];
extern int i810_max_ioctl;
#define I810_BASE(reg) ((unsigned long) \
dev_priv->mmio_map->handle)
#define I810_ADDR(reg) (I810_BASE(reg) + reg)

3
drivers/char/drm/i830_drv.c
View File

@ -75,9 +75,6 @@ static struct pci_device_id pciidlist[] = {
i830_PCI_IDS
};
extern drm_ioctl_desc_t i830_ioctls[];
extern int i830_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |

16
drivers/char/drm/i830_drv.h
View File

@ -120,6 +120,9 @@ typedef struct drm_i830_private {
} drm_i830_private_t;
extern drm_ioctl_desc_t i830_ioctls[];
extern int i830_max_ioctl;
/* i830_dma.c */
extern void i830_reclaim_buffers(drm_device_t * dev, struct file *filp);
@ -139,15 +142,10 @@ extern int i830_driver_dma_quiescent(drm_device_t * dev);
extern void i830_driver_prerelease(drm_device_t * dev, DRMFILE filp);
extern int i830_driver_device_is_agp(drm_device_t * dev);
#define I830_BASE(reg) ((unsigned long) \
dev_priv->mmio_map->handle)
#define I830_ADDR(reg) (I830_BASE(reg) + reg)
#define I830_DEREF(reg) *(__volatile__ unsigned int *)I830_ADDR(reg)
#define I830_READ(reg) readl((volatile u32 *)I830_ADDR(reg))
#define I830_WRITE(reg,val) writel(val, (volatile u32 *)I830_ADDR(reg))
#define I830_DEREF16(reg) *(__volatile__ u16 *)I830_ADDR(reg)
#define I830_READ16(reg) I830_DEREF16(reg)
#define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0)
#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg)
#define I830_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val)
#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg)
#define I830_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, reg, val)
#define I830_VERBOSE 0

3
drivers/char/drm/i915_drv.c
View File

@ -69,9 +69,6 @@ static struct pci_device_id pciidlist[] = {
i915_PCI_IDS
};
extern drm_ioctl_desc_t i915_ioctls[];
extern int i915_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |

3
drivers/char/drm/i915_drv.h
View File

@ -99,6 +99,9 @@ typedef struct drm_i915_private {
struct mem_block *agp_heap;
} drm_i915_private_t;
extern drm_ioctl_desc_t i915_ioctls[];
extern int i915_max_ioctl;
/* i915_dma.c */
extern void i915_kernel_lost_context(drm_device_t * dev);
extern void i915_driver_pretakedown(drm_device_t * dev);

5
drivers/char/drm/mga_drv.c
View File

@ -78,9 +78,6 @@ static struct pci_device_id pciidlist[] = {
mga_PCI_IDS
};
extern drm_ioctl_desc_t mga_ioctls[];
extern int mga_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
@ -151,7 +148,7 @@ MODULE_LICENSE("GPL and additional rights");
* \returns
* If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
*/
int mga_driver_device_is_agp(drm_device_t * dev)
static int mga_driver_device_is_agp(drm_device_t * dev)
{
const struct pci_dev *const pdev = dev->pdev;

3
drivers/char/drm/mga_drv.h
View File

@ -148,6 +148,9 @@ typedef struct drm_mga_private {
unsigned int agp_pages;
} drm_mga_private_t;
extern drm_ioctl_desc_t mga_ioctls[];
extern int mga_max_ioctl;
/* mga_dma.c */
extern int mga_driver_preinit(drm_device_t * dev, unsigned long flags);
extern int mga_dma_bootstrap(DRM_IOCTL_ARGS);

3
drivers/char/drm/r128_drv.c
View File

@ -66,9 +66,6 @@ static struct pci_device_id pciidlist[] = {
r128_PCI_IDS
};
extern drm_ioctl_desc_t r128_ioctls[];
extern int r128_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |

3
drivers/char/drm/r128_drv.h
View File

@ -128,6 +128,9 @@ typedef struct drm_r128_buf_priv {
drm_r128_freelist_t *list_entry;
} drm_r128_buf_priv_t;
extern drm_ioctl_desc_t r128_ioctls[];
extern int r128_max_ioctl;
/* r128_cce.c */
extern int r128_cce_init(DRM_IOCTL_ARGS);
extern int r128_cce_start(DRM_IOCTL_ARGS);

34
drivers/char/drm/r300_cmdbuf.c
View File

@ -53,7 +53,7 @@ static const int r300_cliprect_cntl[4] = {
* buffer, starting with index n.
*/
static int r300_emit_cliprects(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf, int n)
drm_radeon_kcmd_buffer_t * cmdbuf, int n)
{
drm_clip_rect_t box;
int nr;
@ -131,7 +131,7 @@ static int r300_emit_cliprects(drm_radeon_private_t * dev_priv,
return 0;
}
u8 r300_reg_flags[0x10000 >> 2];
static u8 r300_reg_flags[0x10000 >> 2];
void r300_init_reg_flags(void)
{
@ -260,7 +260,7 @@ static __inline__ int r300_check_offset(drm_radeon_private_t * dev_priv,
static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
dev_priv,
drm_radeon_cmd_buffer_t
drm_radeon_kcmd_buffer_t
* cmdbuf,
drm_r300_cmd_header_t
header)
@ -281,7 +281,7 @@ static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
return DRM_ERR(EINVAL);
}
for (i = 0; i < sz; i++) {
values[i] = ((int __user *)cmdbuf->buf)[i];
values[i] = ((int *)cmdbuf->buf)[i];
switch (r300_reg_flags[(reg >> 2) + i]) {
case MARK_SAFE:
break;
@ -318,7 +318,7 @@ static __inline__ int r300_emit_carefully_checked_packet0(drm_radeon_private_t *
* Note that checks are performed on contents and addresses of the registers
*/
static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf,
drm_radeon_kcmd_buffer_t * cmdbuf,
drm_r300_cmd_header_t header)
{
int reg;
@ -349,7 +349,7 @@ static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
BEGIN_RING(1 + sz);
OUT_RING(CP_PACKET0(reg, sz - 1));
OUT_RING_TABLE((int __user *)cmdbuf->buf, sz);
OUT_RING_TABLE((int *)cmdbuf->buf, sz);
ADVANCE_RING();
cmdbuf->buf += sz * 4;
@ -364,7 +364,7 @@ static __inline__ int r300_emit_packet0(drm_radeon_private_t * dev_priv,
* Called by r300_do_cp_cmdbuf.
*/
static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf,
drm_radeon_kcmd_buffer_t * cmdbuf,
drm_r300_cmd_header_t header)
{
int sz;
@ -386,7 +386,7 @@ static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
OUT_RING_REG(R300_VAP_PVS_WAITIDLE, 0);
OUT_RING_REG(R300_VAP_PVS_UPLOAD_ADDRESS, addr);
OUT_RING(CP_PACKET0_TABLE(R300_VAP_PVS_UPLOAD_DATA, sz * 4 - 1));
OUT_RING_TABLE((int __user *)cmdbuf->buf, sz * 4);
OUT_RING_TABLE((int *)cmdbuf->buf, sz * 4);
ADVANCE_RING();
@ -401,7 +401,7 @@ static __inline__ int r300_emit_vpu(drm_radeon_private_t * dev_priv,
* Called by r300_emit_packet3.
*/
static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t * cmdbuf)
{
RING_LOCALS;
@ -412,7 +412,7 @@ static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
OUT_RING(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8));
OUT_RING(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING |
(1 << R300_PRIM_NUM_VERTICES_SHIFT));
OUT_RING_TABLE((int __user *)cmdbuf->buf, 8);
OUT_RING_TABLE((int *)cmdbuf->buf, 8);
ADVANCE_RING();
cmdbuf->buf += 8 * 4;
@ -422,7 +422,7 @@ static __inline__ int r300_emit_clear(drm_radeon_private_t * dev_priv,
}
static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf,
drm_radeon_kcmd_buffer_t * cmdbuf,
u32 header)
{
int count, i, k;
@ -490,7 +490,7 @@ static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t * dev_priv,
}
static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t * cmdbuf)
{
u32 header;
int count;
@ -503,7 +503,7 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
We need to be smarter. */
/* obtain first word - actual packet3 header */
header = *(u32 __user *) cmdbuf->buf;
header = *(u32 *) cmdbuf->buf;
/* Is it packet 3 ? */
if ((header >> 30) != 0x3) {
@ -541,7 +541,7 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
BEGIN_RING(count + 2);
OUT_RING(header);
OUT_RING_TABLE((int __user *)(cmdbuf->buf + 4), count + 1);
OUT_RING_TABLE((int *)(cmdbuf->buf + 4), count + 1);
ADVANCE_RING();
cmdbuf->buf += (count + 2) * 4;
@ -555,12 +555,12 @@ static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t * dev_priv,
* Called by r300_do_cp_cmdbuf.
*/
static __inline__ int r300_emit_packet3(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_buffer_t * cmdbuf,
drm_radeon_kcmd_buffer_t * cmdbuf,
drm_r300_cmd_header_t header)
{
int n;
int ret;
char __user *orig_buf = cmdbuf->buf;
char *orig_buf = cmdbuf->buf;
int orig_bufsz = cmdbuf->bufsz;
/* This is a do-while-loop so that we run the interior at least once,
@ -659,7 +659,7 @@ static void r300_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
*/
int r300_do_cp_cmdbuf(drm_device_t * dev,
DRMFILE filp,
drm_file_t * filp_priv, drm_radeon_cmd_buffer_t * cmdbuf)
drm_file_t * filp_priv, drm_radeon_kcmd_buffer_t * cmdbuf)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;

3
drivers/char/drm/radeon_drv.c
View File

@ -71,9 +71,6 @@ static struct pci_device_id pciidlist[] = {
radeon_PCI_IDS
};
extern drm_ioctl_desc_t radeon_ioctls[];
extern int radeon_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |

12
drivers/char/drm/radeon_drv.h
View File

@ -281,7 +281,17 @@ typedef struct drm_radeon_buf_priv {
u32 age;
} drm_radeon_buf_priv_t;
typedef struct drm_radeon_kcmd_buffer {
int bufsz;
char *buf;
int nbox;
drm_clip_rect_t __user *boxes;
} drm_radeon_kcmd_buffer_t;
extern int radeon_no_wb;
extern drm_ioctl_desc_t radeon_ioctls[];
extern int radeon_max_ioctl;
/* radeon_cp.c */
extern int radeon_cp_init(DRM_IOCTL_ARGS);
extern int radeon_cp_start(DRM_IOCTL_ARGS);
@ -340,7 +350,7 @@ extern void r300_init_reg_flags(void);
extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
drm_file_t * filp_priv,
drm_radeon_cmd_buffer_t * cmdbuf);
drm_radeon_kcmd_buffer_t * cmdbuf);
/* Flags for stats.boxes
*/

23
drivers/char/drm/radeon_state.c
View File

@ -40,7 +40,7 @@
static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
dev_priv,
drm_file_t * filp_priv,
u32 * offset)
u32 *offset)
{
u32 off = *offset;
struct drm_radeon_driver_file_fields *radeon_priv;
@ -66,7 +66,7 @@ static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
dev_priv,
drm_file_t * filp_priv,
int id, u32 __user * data)
int id, u32 *data)
{
switch (id) {
@ -240,8 +240,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t *
dev_priv,
drm_file_t * filp_priv,
drm_radeon_cmd_buffer_t *
cmdbuf,
drm_radeon_kcmd_buffer_t *cmdbuf,
unsigned int *cmdsz)
{
u32 *cmd = (u32 *) cmdbuf->buf;
@ -2564,7 +2563,7 @@ static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
drm_file_t * filp_priv,
drm_radeon_cmd_header_t header,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t *cmdbuf)
{
int id = (int)header.packet.packet_id;
int sz, reg;
@ -2599,7 +2598,7 @@ static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
static __inline__ int radeon_emit_scalars(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_header_t header,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t * cmdbuf)
{
int sz = header.scalars.count;
int start = header.scalars.offset;
@ -2621,7 +2620,7 @@ static __inline__ int radeon_emit_scalars(drm_radeon_private_t * dev_priv,
*/
static __inline__ int radeon_emit_scalars2(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_header_t header,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t * cmdbuf)
{
int sz = header.scalars.count;
int start = ((unsigned int)header.scalars.offset) + 0x100;
@ -2641,7 +2640,7 @@ static __inline__ int radeon_emit_scalars2(drm_radeon_private_t * dev_priv,
static __inline__ int radeon_emit_vectors(drm_radeon_private_t * dev_priv,
drm_radeon_cmd_header_t header,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t * cmdbuf)
{
int sz = header.vectors.count;
int start = header.vectors.offset;
@ -2662,7 +2661,7 @@ static __inline__ int radeon_emit_vectors(drm_radeon_private_t * dev_priv,
static int radeon_emit_packet3(drm_device_t * dev,
drm_file_t * filp_priv,
drm_radeon_cmd_buffer_t * cmdbuf)
drm_radeon_kcmd_buffer_t *cmdbuf)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
unsigned int cmdsz;
@ -2688,7 +2687,7 @@ static int radeon_emit_packet3(drm_device_t * dev,
static int radeon_emit_packet3_cliprect(drm_device_t * dev,
drm_file_t * filp_priv,
drm_radeon_cmd_buffer_t * cmdbuf,
drm_radeon_kcmd_buffer_t *cmdbuf,
int orig_nbox)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2785,7 +2784,7 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf = NULL;
int idx;
drm_radeon_cmd_buffer_t cmdbuf;
drm_radeon_kcmd_buffer_t cmdbuf;
drm_radeon_cmd_header_t header;
int orig_nbox, orig_bufsz;
char *kbuf = NULL;
@ -2819,7 +2818,7 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
kbuf = drm_alloc(cmdbuf.bufsz, DRM_MEM_DRIVER);
if (kbuf == NULL)
return DRM_ERR(ENOMEM);
if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz)) {
if (DRM_COPY_FROM_USER(kbuf, (void __user *)cmdbuf.buf, cmdbuf.bufsz)) {
drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
return DRM_ERR(EFAULT);
}

3
drivers/char/drm/savage_drv.c
View File

@ -59,9 +59,6 @@ static struct pci_device_id pciidlist[] = {
savage_PCI_IDS
};
extern drm_ioctl_desc_t savage_ioctls[];
extern int savage_max_ioctl;
static struct drm_driver driver = {
.driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_PCI_DMA,

3
drivers/char/drm/savage_drv.h
View File

@ -104,6 +104,9 @@ enum savage_family {
S3_LAST
};
extern drm_ioctl_desc_t savage_ioctls[];
extern int savage_max_ioctl;
#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \

6
drivers/char/drm/savage_state.c
View File

@ -816,10 +816,8 @@ static int savage_dispatch_clear(drm_savage_private_t * dev_priv,
if (nbox == 0)
return 0;
DRM_GET_USER_UNCHECKED(mask, &((const drm_savage_cmd_header_t *)data)
->clear1.mask);
DRM_GET_USER_UNCHECKED(value, &((const drm_savage_cmd_header_t *)data)
->clear1.value);
DRM_GET_USER_UNCHECKED(mask, &data->clear1.mask);
DRM_GET_USER_UNCHECKED(value, &data->clear1.value);
clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;

3
drivers/char/drm/sis_drv.c
View File

@ -61,9 +61,6 @@ static struct pci_device_id pciidlist[] = {
sisdrv_PCI_IDS
};
extern drm_ioctl_desc_t sis_ioctls[];
extern int sis_max_ioctl;
static struct drm_driver driver = {
.driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR,
.context_ctor = sis_init_context,

3
drivers/char/drm/sis_drv.h
View File

@ -49,4 +49,7 @@ typedef struct drm_sis_private {
extern int sis_init_context(drm_device_t * dev, int context);
extern int sis_final_context(drm_device_t * dev, int context);
extern drm_ioctl_desc_t sis_ioctls[];
extern int sis_max_ioctl;
#endif

3
drivers/char/drm/via_drv.h
View File

@ -112,4 +112,7 @@ extern void via_init_futex(drm_via_private_t * dev_priv);
extern void via_cleanup_futex(drm_via_private_t * dev_priv);
extern void via_release_futex(drm_via_private_t * dev_priv, int context);
extern int via_parse_command_stream(drm_device_t * dev, const uint32_t * buf,
unsigned int size);
#endif