forked from luck/tmp_suning_uos_patched
tlb: hugetlb: Add more sizes to tlb_remove_huge_tlb_entry
[ Upstream commit 697a1d44af8ba0477ee729e632f4ade37999249a ] tlb_remove_huge_tlb_entry only considers PMD_SIZE and PUD_SIZE when updating the mmu_gather structure. Unfortunately on arm64 there are two additional huge page sizes that need to be covered: CONT_PTE_SIZE and CONT_PMD_SIZE. Where an end-user attempts to employ contiguous huge pages, a VM_BUG_ON can be experienced due to the fact that the tlb structure hasn't been correctly updated by the relevant tlb_flush_p.._range() call from tlb_remove_huge_tlb_entry. This patch adds inequality logic to the generic implementation of tlb_remove_huge_tlb_entry s.t. CONT_PTE_SIZE and CONT_PMD_SIZE are effectively covered on arm64. Also, as well as ptes, pmds and puds; p4ds are now considered too. Reported-by: David Hildenbrand <david@redhat.com> Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/linux-mm/811c5c8e-b3a2-85d2-049c-717f17c3a03a@redhat.com/ Signed-off-by: Steve Capper <steve.capper@arm.com> Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20220330112543.863-1-steve.capper@arm.com Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -563,10 +563,14 @@ static inline void tlb_flush_p4d_range(struct mmu_gather *tlb,
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#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
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do { \
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unsigned long _sz = huge_page_size(h); \
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if (_sz == PMD_SIZE) \
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tlb_flush_pmd_range(tlb, address, _sz); \
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else if (_sz == PUD_SIZE) \
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if (_sz >= P4D_SIZE) \
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tlb_flush_p4d_range(tlb, address, _sz); \
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else if (_sz >= PUD_SIZE) \
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tlb_flush_pud_range(tlb, address, _sz); \
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else if (_sz >= PMD_SIZE) \
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tlb_flush_pmd_range(tlb, address, _sz); \
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else \
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tlb_flush_pte_range(tlb, address, _sz); \
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__tlb_remove_tlb_entry(tlb, ptep, address); \
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} while (0)
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