forked from luck/tmp_suning_uos_patched
[MTD] [NAND] FSL-UPM: add multi chip support
This patch adds support for multi-chip NAND devices to the FSL-UPM driver. This requires support for multiple GPIOs for the RNB pins. The NAND chips are selected through address lines defined by the FDT property "fsl,upm-addr-line-cs-offsets". Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Wolfgang Grandegger
David Woodhouse
parent
db99a55231
commit
b6e0e8c077
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@ -150,7 +150,7 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
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spin_lock_irqsave(&fsl_lbc_lock, flags);
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out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
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out_be32(&fsl_lbc_regs->mar, mar);
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switch (upm->width) {
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case 8:
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@ -36,7 +36,10 @@ struct fsl_upm_nand {
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uint8_t upm_addr_offset;
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uint8_t upm_cmd_offset;
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void __iomem *io_base;
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int rnb_gpio;
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int rnb_gpio[NAND_MAX_CHIPS];
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uint32_t mchip_offsets[NAND_MAX_CHIPS];
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uint32_t mchip_count;
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uint32_t mchip_number;
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int chip_delay;
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};
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@ -46,7 +49,7 @@ static int fun_chip_ready(struct mtd_info *mtd)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
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if (gpio_get_value(fun->rnb_gpio))
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if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
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return 1;
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dev_vdbg(fun->dev, "busy\n");
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@ -55,9 +58,9 @@ static int fun_chip_ready(struct mtd_info *mtd)
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static void fun_wait_rnb(struct fsl_upm_nand *fun)
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{
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int cnt = 1000000;
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if (fun->rnb_gpio[fun->mchip_number] >= 0) {
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int cnt = 1000000;
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if (fun->rnb_gpio >= 0) {
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while (--cnt && !fun_chip_ready(&fun->mtd))
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cpu_relax();
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if (!cnt)
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@ -69,7 +72,9 @@ static void fun_wait_rnb(struct fsl_upm_nand *fun)
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static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
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u32 mar;
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if (!(ctrl & fun->last_ctrl)) {
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fsl_upm_end_pattern(&fun->upm);
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@ -87,11 +92,29 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
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}
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fsl_upm_run_pattern(&fun->upm, fun->io_base, cmd);
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mar = (cmd << (32 - fun->upm.width)) |
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fun->mchip_offsets[fun->mchip_number];
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fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
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fun_wait_rnb(fun);
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}
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static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
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{
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struct nand_chip *chip = mtd->priv;
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struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
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if (mchip_nr == -1) {
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chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
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} else if (mchip_nr >= 0) {
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fun->mchip_number = mchip_nr;
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chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
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chip->IO_ADDR_W = chip->IO_ADDR_R;
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} else {
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BUG();
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}
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}
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static uint8_t fun_read_byte(struct mtd_info *mtd)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
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@ -137,8 +160,10 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
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fun->chip.read_buf = fun_read_buf;
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fun->chip.write_buf = fun_write_buf;
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fun->chip.ecc.mode = NAND_ECC_SOFT;
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if (fun->mchip_count > 1)
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fun->chip.select_chip = fun_select_chip;
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if (fun->rnb_gpio >= 0)
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if (fun->rnb_gpio[0] >= 0)
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fun->chip.dev_ready = fun_chip_ready;
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fun->mtd.priv = &fun->chip;
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@ -155,7 +180,7 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
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goto err;
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}
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ret = nand_scan(&fun->mtd, 1);
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ret = nand_scan(&fun->mtd, fun->mchip_count);
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if (ret)
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goto err;
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@ -185,8 +210,10 @@ static int __devinit fun_probe(struct of_device *ofdev,
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struct fsl_upm_nand *fun;
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struct resource io_res;
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const uint32_t *prop;
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int rnb_gpio;
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int ret;
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int size;
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int i;
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fun = kzalloc(sizeof(*fun), GFP_KERNEL);
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if (!fun)
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@ -208,7 +235,7 @@ static int __devinit fun_probe(struct of_device *ofdev,
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM address offset\n");
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ret = -EINVAL;
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goto err2;
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goto err1;
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}
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fun->upm_addr_offset = *prop;
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@ -216,21 +243,40 @@ static int __devinit fun_probe(struct of_device *ofdev,
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM command offset\n");
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ret = -EINVAL;
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goto err2;
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goto err1;
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}
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fun->upm_cmd_offset = *prop;
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fun->rnb_gpio = of_get_gpio(ofdev->node, 0);
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if (fun->rnb_gpio >= 0) {
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ret = gpio_request(fun->rnb_gpio, dev_name(&ofdev->dev));
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if (ret) {
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dev_err(&ofdev->dev, "can't request RNB gpio\n");
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prop = of_get_property(ofdev->node,
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"fsl,upm-addr-line-cs-offsets", &size);
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if (prop && (size / sizeof(uint32_t)) > 0) {
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fun->mchip_count = size / sizeof(uint32_t);
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if (fun->mchip_count >= NAND_MAX_CHIPS) {
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dev_err(&ofdev->dev, "too much multiple chips\n");
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goto err1;
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}
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for (i = 0; i < fun->mchip_count; i++)
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fun->mchip_offsets[i] = prop[i];
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} else {
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fun->mchip_count = 1;
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}
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for (i = 0; i < fun->mchip_count; i++) {
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fun->rnb_gpio[i] = -1;
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rnb_gpio = of_get_gpio(ofdev->node, i);
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if (rnb_gpio >= 0) {
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ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
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if (ret) {
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dev_err(&ofdev->dev,
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"can't request RNB gpio #%d\n", i);
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goto err2;
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}
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gpio_direction_input(rnb_gpio);
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fun->rnb_gpio[i] = rnb_gpio;
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} else if (rnb_gpio == -EINVAL) {
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dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
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goto err2;
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}
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gpio_direction_input(fun->rnb_gpio);
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} else if (fun->rnb_gpio == -EINVAL) {
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dev_err(&ofdev->dev, "specified RNB gpio is invalid\n");
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goto err2;
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}
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prop = of_get_property(ofdev->node, "chip-delay", NULL);
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@ -240,7 +286,7 @@ static int __devinit fun_probe(struct of_device *ofdev,
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fun->chip_delay = 50;
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fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
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io_res.end - io_res.start + 1);
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io_res.end - io_res.start + 1);
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if (!fun->io_base) {
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ret = -ENOMEM;
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goto err2;
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@ -257,8 +303,11 @@ static int __devinit fun_probe(struct of_device *ofdev,
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return 0;
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err2:
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if (fun->rnb_gpio >= 0)
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gpio_free(fun->rnb_gpio);
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for (i = 0; i < fun->mchip_count; i++) {
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if (fun->rnb_gpio[i] < 0)
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break;
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gpio_free(fun->rnb_gpio[i]);
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}
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err1:
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kfree(fun);
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@ -268,12 +317,16 @@ static int __devinit fun_probe(struct of_device *ofdev,
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static int __devexit fun_remove(struct of_device *ofdev)
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{
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struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
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int i;
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nand_release(&fun->mtd);
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kfree(fun->mtd.name);
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if (fun->rnb_gpio >= 0)
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gpio_free(fun->rnb_gpio);
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for (i = 0; i < fun->mchip_count; i++) {
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if (fun->rnb_gpio[i] < 0)
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break;
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gpio_free(fun->rnb_gpio[i]);
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}
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kfree(fun);
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