forked from luck/tmp_suning_uos_patched
[POWERPC] pasemi: GPIO MDIO of_platform driver
MDIO driver for PHY's connected via GPIO as on the PA Semi Electra eval board. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Olof Johansson
Paul Mackerras
parent
25fc530eed
commit
b97d279143
@ -1,2 +1,2 @@
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obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o
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obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o gpio_mdio.o
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339
arch/powerpc/platforms/pasemi/gpio_mdio.c
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339
arch/powerpc/platforms/pasemi/gpio_mdio.c
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@ -0,0 +1,339 @@
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/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Author: Olof Johansson, PA Semi
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Based on drivers/net/fs_enet/mii-bitbang.c.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <asm/of_platform.h>
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#define DELAY 1
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static void __iomem *gpio_regs;
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struct gpio_priv {
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int mdc_pin;
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int mdio_pin;
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};
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#define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
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#define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
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static inline void mdio_lo(struct mii_bus *bus)
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{
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out_le32(gpio_regs+0x10, 1 << MDIO_PIN(bus));
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}
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static inline void mdio_hi(struct mii_bus *bus)
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{
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out_le32(gpio_regs, 1 << MDIO_PIN(bus));
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}
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static inline void mdc_lo(struct mii_bus *bus)
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{
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out_le32(gpio_regs+0x10, 1 << MDC_PIN(bus));
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}
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static inline void mdc_hi(struct mii_bus *bus)
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{
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out_le32(gpio_regs, 1 << MDC_PIN(bus));
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}
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static inline void mdio_active(struct mii_bus *bus)
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{
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out_le32(gpio_regs+0x20, (1 << MDC_PIN(bus)) | (1 << MDIO_PIN(bus)));
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}
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static inline void mdio_tristate(struct mii_bus *bus)
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{
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out_le32(gpio_regs+0x30, (1 << MDIO_PIN(bus)));
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}
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static inline int mdio_read(struct mii_bus *bus)
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{
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return !!(in_le32(gpio_regs+0x40) & (1 << MDIO_PIN(bus)));
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}
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static void clock_out(struct mii_bus *bus, int bit)
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{
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if (bit)
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mdio_hi(bus);
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else
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mdio_lo(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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mdc_lo(bus);
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}
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/* Utility to send the preamble, address, and register (common to read and write). */
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static void bitbang_pre(struct mii_bus *bus, int read, u8 addr, u8 reg)
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{
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int i;
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/* CFE uses a really long preamble (40 bits). We'll do the same. */
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mdio_active(bus);
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for (i = 0; i < 40; i++) {
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clock_out(bus, 1);
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}
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/* send the start bit (01) and the read opcode (10) or write (10) */
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clock_out(bus, 0);
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clock_out(bus, 1);
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clock_out(bus, read);
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clock_out(bus, !read);
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/* send the PHY address */
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for (i = 0; i < 5; i++) {
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clock_out(bus, (addr & 0x10) != 0);
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addr <<= 1;
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}
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/* send the register address */
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for (i = 0; i < 5; i++) {
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clock_out(bus, (reg & 0x10) != 0);
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reg <<= 1;
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}
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}
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static int gpio_mdio_read(struct mii_bus *bus, int phy_id, int location)
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{
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u16 rdreg;
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int ret, i;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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bitbang_pre(bus, 1, addr, reg);
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/* tri-state our MDIO I/O pin so we can read */
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mdio_tristate(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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mdc_lo(bus);
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/* read 16 bits of register data, MSB first */
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rdreg = 0;
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for (i = 0; i < 16; i++) {
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mdc_lo(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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mdc_lo(bus);
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udelay(DELAY);
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rdreg <<= 1;
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rdreg |= mdio_read(bus);
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}
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mdc_hi(bus);
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udelay(DELAY);
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mdc_lo(bus);
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udelay(DELAY);
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ret = rdreg;
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return ret;
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}
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static int gpio_mdio_write(struct mii_bus *bus, int phy_id, int location, u16 val)
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{
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int i;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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u16 value = val & 0xffff;
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bitbang_pre(bus, 0, addr, reg);
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/* send the turnaround (10) */
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mdc_lo(bus);
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mdio_hi(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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mdc_lo(bus);
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mdio_lo(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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/* write 16 bits of register data, MSB first */
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for (i = 0; i < 16; i++) {
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mdc_lo(bus);
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if (value & 0x8000)
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mdio_hi(bus);
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else
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mdio_lo(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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value <<= 1;
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}
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/*
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* Tri-state the MDIO line.
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*/
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mdio_tristate(bus);
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mdc_lo(bus);
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udelay(DELAY);
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mdc_hi(bus);
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udelay(DELAY);
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return 0;
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}
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static int gpio_mdio_reset(struct mii_bus *bus)
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{
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/*nothing here - dunno how to reset it*/
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return 0;
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}
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static int __devinit gpio_mdio_probe(struct of_device *ofdev,
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const struct of_device_id *match)
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{
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struct device *dev = &ofdev->dev;
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struct device_node *np = ofdev->node;
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struct device_node *gpio_np;
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struct mii_bus *new_bus;
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struct resource res;
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struct gpio_priv *priv;
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const unsigned int *prop;
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int err = 0;
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int i;
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gpio_np = of_find_compatible_node(NULL, "gpio", "1682m-gpio");
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if (!gpio_np)
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return -ENODEV;
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err = of_address_to_resource(gpio_np, 0, &res);
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of_node_put(gpio_np);
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if (err)
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return -EINVAL;
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if (!gpio_regs)
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gpio_regs = ioremap(res.start, 0x100);
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if (!gpio_regs)
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return -EPERM;
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priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
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if (priv == NULL)
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return -ENOMEM;
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new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
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if (new_bus == NULL)
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return -ENOMEM;
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new_bus->name = "pasemi gpio mdio bus",
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new_bus->read = &gpio_mdio_read,
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new_bus->write = &gpio_mdio_write,
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new_bus->reset = &gpio_mdio_reset,
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prop = get_property(np, "reg", NULL);
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new_bus->id = *prop;
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new_bus->priv = priv;
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new_bus->phy_mask = 0;
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new_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
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for(i = 0; i < PHY_MAX_ADDR; ++i)
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new_bus->irq[i] = irq_create_mapping(NULL, 10);
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prop = get_property(np, "mdc-pin", NULL);
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priv->mdc_pin = *prop;
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prop = get_property(np, "mdio-pin", NULL);
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priv->mdio_pin = *prop;
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new_bus->dev = dev;
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dev_set_drvdata(dev, new_bus);
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err = mdiobus_register(new_bus);
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if (0 != err) {
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printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
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new_bus->name, err);
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goto bus_register_fail;
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}
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return 0;
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bus_register_fail:
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kfree(new_bus);
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return err;
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}
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static int gpio_mdio_remove(struct of_device *dev)
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{
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struct mii_bus *bus = dev_get_drvdata(&dev->dev);
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mdiobus_unregister(bus);
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dev_set_drvdata(&dev->dev, NULL);
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kfree(bus->priv);
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bus->priv = NULL;
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kfree(bus);
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return 0;
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}
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static struct of_device_id gpio_mdio_match[] =
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{
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{
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.compatible = "gpio-mdio",
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},
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{},
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};
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static struct of_platform_driver gpio_mdio_driver =
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{
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.name = "gpio-mdio-bitbang",
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.match_table = gpio_mdio_match,
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.probe = gpio_mdio_probe,
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.remove = gpio_mdio_remove,
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};
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int gpio_mdio_init(void)
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{
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return of_register_platform_driver(&gpio_mdio_driver);
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}
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void gpio_mdio_exit(void)
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{
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of_unregister_platform_driver(&gpio_mdio_driver);
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}
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device_initcall(gpio_mdio_init);
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@ -209,6 +209,20 @@ static void __init pas_init_early(void)
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iommu_init_early_pasemi();
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}
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static struct of_device_id pasemi_bus_ids[] = {
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{ .type = "sdc", },
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{},
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};
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static int __init pasemi_publish_devices(void)
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{
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/* Publish OF platform devices for southbridge IOs */
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of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
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return 0;
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}
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device_initcall(pasemi_publish_devices);
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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