AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

arch/sh: add sh7786_mm_sel() function

Browse Source 
The SH7786 has different physical memory layout configurations,
configurable through the MMSELR register. The configuration is
typically defined by the bootloader, so Linux generally doesn't care.

Except that depending on the configuration, some PCI MEM areas may or
may not be available. This commit adds a helper function that allows
to retrieve the current physical memory layout configuration. It will
be used in a following patch to exclude unusable PCI MEM areas during
the PCI initialization.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Rich Felker <dalias@libc.org>
This commit is contained in:
Thomas Petazzoni 2017-12-04 16:09:00 +01:00 committed by Rich Felker
parent 96a598996f
commit bc05aa6e13
1 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/sh/include/cpu-sh4/cpu/sh7786.h
View File

@ -14,6 +14,8 @@
#ifndef __CPU_SH7786_H__ #ifndef __CPU_SH7786_H__
#define __CPU_SH7786_H__ #define __CPU_SH7786_H__
#include <linux/io.h>
enum { enum {
/* PA */ /* PA */
GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4, GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
@ -131,4 +133,9 @@ enum {
GPIO_FN_IRL7, GPIO_FN_IRL6, GPIO_FN_IRL5, GPIO_FN_IRL4, GPIO_FN_IRL7, GPIO_FN_IRL6, GPIO_FN_IRL5, GPIO_FN_IRL4,
}; };
static inline u32 sh7786_mm_sel(void)
{
return __raw_readl(0xFC400020) & 0x7;
}
#endif /* __CPU_SH7786_H__ */ #endif /* __CPU_SH7786_H__ */