forked from luck/tmp_suning_uos_patched
[libata ahci] Isolate Intel-ism, add JMicron JMB360 support
Isolate some PCI config register bitbanging to Intel hardware, as it should have been all along. Add support for JMicron JMB360.
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3ee68c4af3
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bd12097c74
@ -286,6 +286,8 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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board_ahci }, /* ICH8M */
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{ PCI_VENDOR_ID_INTEL, 0x282a, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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board_ahci }, /* ICH8M */
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{ 0x197b, 0x2360, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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board_ahci }, /* JMicron JMB360 */
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{ } /* terminate list */
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};
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@ -802,7 +804,6 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
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void __iomem *mmio = probe_ent->mmio_base;
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u32 tmp, cap_save;
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u16 tmp16;
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unsigned int i, j, using_dac;
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int rc;
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void __iomem *port_mmio;
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@ -836,9 +837,13 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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writel(0xf, mmio + HOST_PORTS_IMPL);
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(void) readl(mmio + HOST_PORTS_IMPL); /* flush */
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pci_read_config_word(pdev, 0x92, &tmp16);
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tmp16 |= 0xf;
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pci_write_config_word(pdev, 0x92, tmp16);
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if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
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u16 tmp16;
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pci_read_config_word(pdev, 0x92, &tmp16);
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tmp16 |= 0xf;
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pci_write_config_word(pdev, 0x92, tmp16);
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}
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hpriv->cap = readl(mmio + HOST_CAP);
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hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
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@ -1082,6 +1087,10 @@ static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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if (have_msi)
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hpriv->flags |= AHCI_FLAG_MSI;
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/* JMicron-specific fixup: make sure we're in AHCI mode */
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if (pdev->vendor == 0x197b)
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pci_write_config_byte(pdev, 0x41, 0xa1);
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/* initialize adapter */
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rc = ahci_host_init(probe_ent);
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if (rc)
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