AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Davinci: aintc/cpintc - use ioremap()

Browse Source 
This patch implements the following:

 - interrupt initialization uses ioremap() instead of passing a virtual address
   via davinci_soc_info.

 - machine definitions directly point to cp_intc_init() or davinci_irq_init()

 - davinci_intc_type and davinci_intc_base now get initialized in controller
   specific init functions instead of davinci_common_init()

 - minor fix in davinci_irq_init() to use intc_irq_num instead of
   DAVINCI_N_AINTC_IRQ

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Cyril Chemparathy 2010-05-07 17:06:37 -04:00 committed by Kevin Hilman
parent e4c822c7e9
commit bd80894704
20 changed files with 36 additions and 80 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/mach-davinci/board-da830-evm.c
View File

@ -561,14 +561,6 @@ static int __init da830_evm_console_init(void)
console_initcall(da830_evm_console_init);
#endif
static __init void da830_evm_irq_init(void)
{
struct davinci_soc_info *soc_info = &davinci_soc_info;
cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
soc_info->intc_irq_prios, NULL);
}
static void __init da830_evm_map_io(void)
{
da830_init();
@ -579,7 +571,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (DA8XX_DDR_BASE + 0x100),
.map_io = da830_evm_map_io,
.init_irq = da830_evm_irq_init,
.init_irq = cp_intc_init,
.timer = &davinci_timer,
.init_machine = da830_evm_init,
MACHINE_END

10
arch/arm/mach-davinci/board-da850-evm.c
View File

@ -736,14 +736,6 @@ static int __init da850_evm_console_init(void)
console_initcall(da850_evm_console_init);
#endif
static __init void da850_evm_irq_init(void)
{
struct davinci_soc_info *soc_info = &davinci_soc_info;
cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
soc_info->intc_irq_prios, NULL);
}
static void __init da850_evm_map_io(void)
{
da850_init();
@ -754,7 +746,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (DA8XX_DDR_BASE + 0x100),
.map_io = da850_evm_map_io,
.init_irq = da850_evm_irq_init,
.init_irq = cp_intc_init,
.timer = &davinci_timer,
.init_machine = da850_evm_init,
MACHINE_END

7
arch/arm/mach-davinci/board-dm355-evm.c
View File

@ -350,17 +350,12 @@ static __init void dm355_evm_init(void)
dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
}
static __init void dm355_evm_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (0x80000100),
.map_io = dm355_evm_map_io,
.init_irq = dm355_evm_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = dm355_evm_init,
MACHINE_END

7
arch/arm/mach-davinci/board-dm355-leopard.c
View File

@ -269,17 +269,12 @@ static __init void dm355_leopard_init(void)
ARRAY_SIZE(dm355_leopard_spi_info));
}
static __init void dm355_leopard_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (0x80000100),
.map_io = dm355_leopard_map_io,
.init_irq = dm355_leopard_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = dm355_leopard_init,
MACHINE_END

7
arch/arm/mach-davinci/board-dm365-evm.c
View File

@ -608,17 +608,12 @@ static __init void dm365_evm_init(void)
ARRAY_SIZE(dm365_evm_spi_info));
}
static __init void dm365_evm_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (0x80000100),
.map_io = dm365_evm_map_io,
.init_irq = dm365_evm_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = dm365_evm_init,
MACHINE_END

7
arch/arm/mach-davinci/board-dm644x-evm.c
View File

@ -704,18 +704,13 @@ static __init void davinci_evm_init(void)
}
static __init void davinci_evm_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
/* Maintainer: MontaVista Software <source@mvista.com> */
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (DAVINCI_DDR_BASE + 0x100),
.map_io = davinci_evm_map_io,
.init_irq = davinci_evm_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = davinci_evm_init,
MACHINE_END

9
arch/arm/mach-davinci/board-dm646x-evm.c
View File

@ -739,11 +739,6 @@ static __init void evm_init(void)
soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
}
static __init void davinci_dm646x_evm_irq_init(void)
{
davinci_irq_init();
}
#define DM646X_EVM_REF_FREQ 27000000
#define DM6467T_EVM_REF_FREQ 33000000
@ -760,7 +755,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (0x80000100),
.map_io = davinci_map_io,
.init_irq = davinci_dm646x_evm_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = evm_init,
MACHINE_END
@ -770,7 +765,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (0x80000100),
.map_io = davinci_map_io,
.init_irq = davinci_dm646x_evm_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = evm_init,
MACHINE_END

7
arch/arm/mach-davinci/board-neuros-osd2.c
View File

@ -273,18 +273,13 @@ static __init void davinci_ntosd2_init(void)
davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
}
static __init void davinci_ntosd2_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
/* Maintainer: Neuros Technologies <neuros@groups.google.com> */
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (DAVINCI_DDR_BASE + 0x100),
.map_io = davinci_ntosd2_map_io,
.init_irq = davinci_ntosd2_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = davinci_ntosd2_init,
MACHINE_END

7
arch/arm/mach-davinci/board-sffsdr.c
View File

@ -152,18 +152,13 @@ static __init void davinci_sffsdr_init(void)
davinci_cfg_reg(DM644X_VLYNQWD);
}
static __init void davinci_sffsdr_irq_init(void)
{
davinci_irq_init();
}
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
.phys_io = IO_PHYS,
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
.boot_params = (DAVINCI_DDR_BASE + 0x100),
.map_io = davinci_sffsdr_map_io,
.init_irq = davinci_sffsdr_irq_init,
.init_irq = davinci_irq_init,
.timer = &davinci_timer,
.init_machine = davinci_sffsdr_init,
MACHINE_END

2
arch/arm/mach-davinci/common.c
View File

@ -112,8 +112,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
goto err;
}
davinci_intc_base = davinci_soc_info.intc_base;
davinci_intc_type = davinci_soc_info.intc_type;
return;
err:

18
arch/arm/mach-davinci/cp_intc.c
View File

@ -13,18 +13,17 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
static void __iomem *cp_intc_base;
static inline unsigned int cp_intc_read(unsigned offset)
{
return __raw_readl(cp_intc_base + offset);
return __raw_readl(davinci_intc_base + offset);
}
static inline void cp_intc_write(unsigned long value, unsigned offset)
{
__raw_writel(value, cp_intc_base + offset);
__raw_writel(value, davinci_intc_base + offset);
}
static void cp_intc_ack_irq(unsigned int irq)
@ -100,13 +99,18 @@ static struct irq_chip cp_intc_irq_chip = {
.set_wake = cp_intc_set_wake,
};
void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
u8 *irq_prio, u32 *host_map)
void __init cp_intc_init(void)
{
unsigned long num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
u32 *host_map = davinci_soc_info.intc_host_map;
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i;
cp_intc_base = base;
davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
if (WARN_ON(!davinci_intc_base))
return;
cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);

2
arch/arm/mach-davinci/da830.c
View File

@ -1193,7 +1193,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
.intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
.intc_base = DA8XX_CP_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da830_default_priorities,
.intc_irq_num = DA830_N_CP_INTC_IRQ,

2
arch/arm/mach-davinci/da850.c
View File

@ -1078,7 +1078,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
.intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
.intc_base = DA8XX_CP_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da850_default_priorities,
.intc_irq_num = DA850_N_CP_INTC_IRQ,

2
arch/arm/mach-davinci/dm355.c
View File

@ -847,7 +847,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
.intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE),
.intc_base = DAVINCI_ARM_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm355_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,

2
arch/arm/mach-davinci/dm365.c
View File

@ -1052,7 +1052,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
.intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE),
.intc_base = DAVINCI_ARM_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm365_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,

2
arch/arm/mach-davinci/dm644x.c
View File

@ -738,7 +738,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
.intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE),
.intc_base = DAVINCI_ARM_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm644x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,

2
arch/arm/mach-davinci/dm646x.c
View File

@ -822,7 +822,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
.intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE),
.intc_base = DAVINCI_ARM_INTC_BASE,
.intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm646x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,

3
arch/arm/mach-davinci/include/mach/common.h
View File

@ -54,10 +54,11 @@ struct davinci_soc_info {
void __iomem *pinmux_base;
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
void __iomem *intc_base;
u32 intc_base;
int intc_type;
u8 *intc_irq_prios;
unsigned long intc_irq_num;
u32 *intc_host_map;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;

3
arch/arm/mach-davinci/include/mach/cp_intc.h
View File

@ -51,7 +51,6 @@
#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
u8 *irq_prio, u32 *host_map);
void __init cp_intc_init(void);
#endif /* __ASM_HARDWARE_CP_INTC_H */

7
arch/arm/mach-davinci/irq.c
View File

@ -116,6 +116,11 @@ void __init davinci_irq_init(void)
unsigned i;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
if (WARN_ON(!davinci_intc_base))
return;
/* Clear all interrupt requests */
davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
@ -148,7 +153,7 @@ void __init davinci_irq_init(void)
}
/* set up genirq dispatch for ARM INTC */
for (i = 0; i < DAVINCI_N_AINTC_IRQ; i++) {
for (i = 0; i < davinci_soc_info.intc_irq_num; i++) {
set_irq_chip(i, &davinci_irq_chip_0);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
if (i != IRQ_TINT1_TINT34)