forked from luck/tmp_suning_uos_patched
crypto: rockchip - add hash support for crypto engine in rk3288
Add md5 sha1 sha256 support for crypto engine in rk3288. Signed-off-by: Zain Wang <zain.wang@rock-chips.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
parent
49abc0d2e1
commit
bfd927ffa2
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@ -508,6 +508,10 @@ config CRYPTO_DEV_ROCKCHIP
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depends on OF && ARCH_ROCKCHIP
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select CRYPTO_AES
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select CRYPTO_DES
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select CRYPTO_MD5
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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select CRYPTO_HASH
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select CRYPTO_BLKCIPHER
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help
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@ -1,3 +1,4 @@
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obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
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rk_crypto-objs := rk3288_crypto.o \
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rk3288_crypto_ablkcipher.o \
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rk3288_crypto_ahash.o
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@ -208,6 +208,8 @@ static void rk_crypto_tasklet_cb(unsigned long data)
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if (crypto_tfm_alg_type(async_req->tfm) == CRYPTO_ALG_TYPE_ABLKCIPHER)
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dev->ablk_req = ablkcipher_request_cast(async_req);
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else
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dev->ahash_req = ahash_request_cast(async_req);
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err = dev->start(dev);
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if (err)
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dev->complete(dev, err);
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@ -220,6 +222,9 @@ static struct rk_crypto_tmp *rk_cipher_algs[] = {
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&rk_cbc_des_alg,
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&rk_ecb_des3_ede_alg,
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&rk_cbc_des3_ede_alg,
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&rk_ahash_sha1,
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&rk_ahash_sha256,
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&rk_ahash_md5,
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};
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static int rk_crypto_register(struct rk_crypto_info *crypto_info)
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@ -229,15 +234,24 @@ static int rk_crypto_register(struct rk_crypto_info *crypto_info)
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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rk_cipher_algs[i]->dev = crypto_info;
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err = crypto_register_alg(&rk_cipher_algs[i]->alg);
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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err = crypto_register_alg(
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&rk_cipher_algs[i]->alg.crypto);
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else
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err = crypto_register_ahash(
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&rk_cipher_algs[i]->alg.hash);
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if (err)
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goto err_cipher_algs;
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}
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return 0;
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err_cipher_algs:
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for (k = 0; k < i; k++)
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crypto_unregister_alg(&rk_cipher_algs[k]->alg);
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for (k = 0; k < i; k++) {
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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crypto_unregister_alg(&rk_cipher_algs[k]->alg.crypto);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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return err;
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}
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@ -245,8 +259,12 @@ static void rk_crypto_unregister(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++)
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crypto_unregister_alg(&rk_cipher_algs[i]->alg);
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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crypto_unregister_alg(&rk_cipher_algs[i]->alg.crypto);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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}
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static void rk_crypto_action(void *data)
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@ -6,6 +6,10 @@
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#include <crypto/algapi.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <crypto/internal/hash.h>
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#include <crypto/md5.h>
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#include <crypto/sha.h>
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#define _SBF(v, f) ((v) << (f))
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@ -149,6 +153,28 @@
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#define RK_CRYPTO_TDES_KEY3_0 0x0130
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#define RK_CRYPTO_TDES_KEY3_1 0x0134
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/* HASH */
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#define RK_CRYPTO_HASH_CTRL 0x0180
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#define RK_CRYPTO_HASH_SWAP_DO BIT(3)
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#define RK_CRYPTO_HASH_SWAP_DI BIT(2)
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#define RK_CRYPTO_HASH_SHA1 _SBF(0x00, 0)
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#define RK_CRYPTO_HASH_MD5 _SBF(0x01, 0)
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#define RK_CRYPTO_HASH_SHA256 _SBF(0x02, 0)
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#define RK_CRYPTO_HASH_PRNG _SBF(0x03, 0)
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#define RK_CRYPTO_HASH_STS 0x0184
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#define RK_CRYPTO_HASH_DONE BIT(0)
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#define RK_CRYPTO_HASH_MSG_LEN 0x0188
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#define RK_CRYPTO_HASH_DOUT_0 0x018c
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#define RK_CRYPTO_HASH_DOUT_1 0x0190
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#define RK_CRYPTO_HASH_DOUT_2 0x0194
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#define RK_CRYPTO_HASH_DOUT_3 0x0198
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#define RK_CRYPTO_HASH_DOUT_4 0x019c
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#define RK_CRYPTO_HASH_DOUT_5 0x01a0
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#define RK_CRYPTO_HASH_DOUT_6 0x01a4
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#define RK_CRYPTO_HASH_DOUT_7 0x01a8
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#define CRYPTO_READ(dev, offset) \
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readl_relaxed(((dev)->reg + (offset)))
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#define CRYPTO_WRITE(dev, offset, val) \
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@ -166,6 +192,7 @@ struct rk_crypto_info {
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struct crypto_queue queue;
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struct tasklet_struct crypto_tasklet;
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struct ablkcipher_request *ablk_req;
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struct ahash_request *ahash_req;
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/* device lock */
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spinlock_t lock;
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@ -195,15 +222,36 @@ struct rk_crypto_info {
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void (*unload_data)(struct rk_crypto_info *dev);
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};
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/* the private variable of hash */
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struct rk_ahash_ctx {
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struct rk_crypto_info *dev;
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/* for fallback */
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struct crypto_ahash *fallback_tfm;
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};
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/* the privete variable of hash for fallback */
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struct rk_ahash_rctx {
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struct ahash_request fallback_req;
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};
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/* the private variable of cipher */
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struct rk_cipher_ctx {
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struct rk_crypto_info *dev;
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unsigned int keylen;
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};
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enum alg_type {
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ALG_TYPE_HASH,
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ALG_TYPE_CIPHER,
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};
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struct rk_crypto_tmp {
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struct rk_crypto_info *dev;
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struct crypto_alg alg;
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struct rk_crypto_info *dev;
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union {
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struct crypto_alg crypto;
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struct ahash_alg hash;
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} alg;
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enum alg_type type;
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};
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extern struct rk_crypto_tmp rk_ecb_aes_alg;
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@ -213,4 +261,8 @@ extern struct rk_crypto_tmp rk_cbc_des_alg;
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extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
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extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
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extern struct rk_crypto_tmp rk_ahash_sha1;
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extern struct rk_crypto_tmp rk_ahash_sha256;
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extern struct rk_crypto_tmp rk_ahash_md5;
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#endif
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@ -336,7 +336,7 @@ static int rk_ablk_cra_init(struct crypto_tfm *tfm)
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struct crypto_alg *alg = tfm->__crt_alg;
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struct rk_crypto_tmp *algt;
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algt = container_of(alg, struct rk_crypto_tmp, alg);
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algt = container_of(alg, struct rk_crypto_tmp, alg.crypto);
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ctx->dev = algt->dev;
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ctx->dev->align_size = crypto_tfm_alg_alignmask(tfm) + 1;
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@ -357,7 +357,8 @@ static void rk_ablk_cra_exit(struct crypto_tfm *tfm)
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}
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struct rk_crypto_tmp rk_ecb_aes_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "ecb(aes)",
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.cra_driver_name = "ecb-aes-rk",
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.cra_priority = 300,
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@ -381,7 +382,8 @@ struct rk_crypto_tmp rk_ecb_aes_alg = {
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};
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struct rk_crypto_tmp rk_cbc_aes_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "cbc(aes)",
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.cra_driver_name = "cbc-aes-rk",
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.cra_priority = 300,
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@ -406,7 +408,8 @@ struct rk_crypto_tmp rk_cbc_aes_alg = {
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};
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struct rk_crypto_tmp rk_ecb_des_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "ecb(des)",
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.cra_driver_name = "ecb-des-rk",
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.cra_priority = 300,
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@ -430,7 +433,8 @@ struct rk_crypto_tmp rk_ecb_des_alg = {
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};
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struct rk_crypto_tmp rk_cbc_des_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "cbc(des)",
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.cra_driver_name = "cbc-des-rk",
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.cra_priority = 300,
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@ -455,7 +459,8 @@ struct rk_crypto_tmp rk_cbc_des_alg = {
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};
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struct rk_crypto_tmp rk_ecb_des3_ede_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "ecb(des3_ede)",
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.cra_driver_name = "ecb-des3-ede-rk",
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.cra_priority = 300,
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@ -480,7 +485,8 @@ struct rk_crypto_tmp rk_ecb_des3_ede_alg = {
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};
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struct rk_crypto_tmp rk_cbc_des3_ede_alg = {
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.alg = {
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.type = ALG_TYPE_CIPHER,
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.alg.crypto = {
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.cra_name = "cbc(des3_ede)",
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.cra_driver_name = "cbc-des3-ede-rk",
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.cra_priority = 300,
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404
drivers/crypto/rockchip/rk3288_crypto_ahash.c
Normal file
404
drivers/crypto/rockchip/rk3288_crypto_ahash.c
Normal file
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/*
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* Crypto acceleration support for Rockchip RK3288
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Zain Wang <zain.wang@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* Some ideas are from marvell/cesa.c and s5p-sss.c driver.
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*/
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#include "rk3288_crypto.h"
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/*
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* IC can not process zero message hash,
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* so we put the fixed hash out when met zero message.
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*/
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static int zero_message_process(struct ahash_request *req)
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{
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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int rk_digest_size = crypto_ahash_digestsize(tfm);
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switch (rk_digest_size) {
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case SHA1_DIGEST_SIZE:
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memcpy(req->result, sha1_zero_message_hash, rk_digest_size);
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break;
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case SHA256_DIGEST_SIZE:
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memcpy(req->result, sha256_zero_message_hash, rk_digest_size);
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break;
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case MD5_DIGEST_SIZE:
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memcpy(req->result, md5_zero_message_hash, rk_digest_size);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static void rk_ahash_crypto_complete(struct rk_crypto_info *dev, int err)
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{
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if (dev->ahash_req->base.complete)
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dev->ahash_req->base.complete(&dev->ahash_req->base, err);
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}
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static void rk_ahash_reg_init(struct rk_crypto_info *dev)
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{
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int reg_status = 0;
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reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL) |
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RK_CRYPTO_HASH_FLUSH | _SBF(0xffff, 16);
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CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
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reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL);
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reg_status &= (~RK_CRYPTO_HASH_FLUSH);
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reg_status |= _SBF(0xffff, 16);
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CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
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memset_io(dev->reg + RK_CRYPTO_HASH_DOUT_0, 0, 32);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTENA, RK_CRYPTO_HRDMA_ERR_ENA |
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RK_CRYPTO_HRDMA_DONE_ENA);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, RK_CRYPTO_HRDMA_ERR_INT |
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RK_CRYPTO_HRDMA_DONE_INT);
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CRYPTO_WRITE(dev, RK_CRYPTO_HASH_CTRL, dev->mode |
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RK_CRYPTO_HASH_SWAP_DO);
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CRYPTO_WRITE(dev, RK_CRYPTO_CONF, RK_CRYPTO_BYTESWAP_HRFIFO |
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RK_CRYPTO_BYTESWAP_BRFIFO |
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RK_CRYPTO_BYTESWAP_BTFIFO);
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CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, dev->total);
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}
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static int rk_ahash_init(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_init(&rctx->fallback_req);
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}
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static int rk_ahash_update(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = req->nbytes;
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rctx->fallback_req.src = req->src;
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return crypto_ahash_update(&rctx->fallback_req);
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}
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static int rk_ahash_final(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.result = req->result;
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return crypto_ahash_final(&rctx->fallback_req);
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}
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static int rk_ahash_finup(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = req->nbytes;
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rctx->fallback_req.src = req->src;
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rctx->fallback_req.result = req->result;
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return crypto_ahash_finup(&rctx->fallback_req);
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}
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static int rk_ahash_import(struct ahash_request *req, const void *in)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_import(&rctx->fallback_req, in);
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}
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static int rk_ahash_export(struct ahash_request *req, void *out)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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|
||||
return crypto_ahash_export(&rctx->fallback_req, out);
|
||||
}
|
||||
|
||||
static int rk_ahash_digest(struct ahash_request *req)
|
||||
{
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct rk_ahash_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct rk_crypto_info *dev = NULL;
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
if (!req->nbytes)
|
||||
return zero_message_process(req);
|
||||
|
||||
dev = tctx->dev;
|
||||
dev->total = req->nbytes;
|
||||
dev->left_bytes = req->nbytes;
|
||||
dev->aligned = 0;
|
||||
dev->mode = 0;
|
||||
dev->align_size = 4;
|
||||
dev->sg_dst = NULL;
|
||||
dev->sg_src = req->src;
|
||||
dev->first = req->src;
|
||||
dev->nents = sg_nents(req->src);
|
||||
|
||||
switch (crypto_ahash_digestsize(tfm)) {
|
||||
case SHA1_DIGEST_SIZE:
|
||||
dev->mode = RK_CRYPTO_HASH_SHA1;
|
||||
break;
|
||||
case SHA256_DIGEST_SIZE:
|
||||
dev->mode = RK_CRYPTO_HASH_SHA256;
|
||||
break;
|
||||
case MD5_DIGEST_SIZE:
|
||||
dev->mode = RK_CRYPTO_HASH_MD5;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rk_ahash_reg_init(dev);
|
||||
|
||||
spin_lock_irqsave(&dev->lock, flags);
|
||||
ret = crypto_enqueue_request(&dev->queue, &req->base);
|
||||
spin_unlock_irqrestore(&dev->lock, flags);
|
||||
|
||||
tasklet_schedule(&dev->crypto_tasklet);
|
||||
|
||||
/*
|
||||
* it will take some time to process date after last dma transmission.
|
||||
*
|
||||
* waiting time is relative with the last date len,
|
||||
* so cannot set a fixed time here.
|
||||
* 10-50 makes system not call here frequently wasting
|
||||
* efficiency, and make it response quickly when dma
|
||||
* complete.
|
||||
*/
|
||||
while (!CRYPTO_READ(dev, RK_CRYPTO_HASH_STS))
|
||||
usleep_range(10, 50);
|
||||
|
||||
memcpy_fromio(req->result, dev->reg + RK_CRYPTO_HASH_DOUT_0,
|
||||
crypto_ahash_digestsize(tfm));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void crypto_ahash_dma_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, dev->addr_in);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, (dev->count + 3) / 4);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_HASH_START |
|
||||
(RK_CRYPTO_HASH_START << 16));
|
||||
}
|
||||
|
||||
static int rk_ahash_set_data_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = dev->load_data(dev, dev->sg_src, NULL);
|
||||
if (!err)
|
||||
crypto_ahash_dma_start(dev);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rk_ahash_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
return rk_ahash_set_data_start(dev);
|
||||
}
|
||||
|
||||
static int rk_ahash_crypto_rx(struct rk_crypto_info *dev)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
dev->unload_data(dev);
|
||||
if (dev->left_bytes) {
|
||||
if (dev->aligned) {
|
||||
if (sg_is_last(dev->sg_src)) {
|
||||
dev_warn(dev->dev, "[%s:%d], Lack of data\n",
|
||||
__func__, __LINE__);
|
||||
err = -ENOMEM;
|
||||
goto out_rx;
|
||||
}
|
||||
dev->sg_src = sg_next(dev->sg_src);
|
||||
}
|
||||
err = rk_ahash_set_data_start(dev);
|
||||
} else {
|
||||
dev->complete(dev, 0);
|
||||
}
|
||||
|
||||
out_rx:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rk_cra_hash_init(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
|
||||
struct rk_crypto_tmp *algt;
|
||||
struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg);
|
||||
|
||||
const char *alg_name = crypto_tfm_alg_name(tfm);
|
||||
|
||||
algt = container_of(alg, struct rk_crypto_tmp, alg.hash);
|
||||
|
||||
tctx->dev = algt->dev;
|
||||
tctx->dev->addr_vir = (void *)__get_free_page(GFP_KERNEL);
|
||||
if (!tctx->dev->addr_vir) {
|
||||
dev_err(tctx->dev->dev, "failed to kmalloc for addr_vir\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
tctx->dev->start = rk_ahash_start;
|
||||
tctx->dev->update = rk_ahash_crypto_rx;
|
||||
tctx->dev->complete = rk_ahash_crypto_complete;
|
||||
|
||||
/* for fallback */
|
||||
tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0,
|
||||
CRYPTO_ALG_NEED_FALLBACK);
|
||||
if (IS_ERR(tctx->fallback_tfm)) {
|
||||
dev_err(tctx->dev->dev, "Could not load fallback driver.\n");
|
||||
return PTR_ERR(tctx->fallback_tfm);
|
||||
}
|
||||
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
|
||||
sizeof(struct rk_ahash_rctx) +
|
||||
crypto_ahash_reqsize(tctx->fallback_tfm));
|
||||
|
||||
return tctx->dev->enable_clk(tctx->dev);
|
||||
}
|
||||
|
||||
static void rk_cra_hash_exit(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
free_page((unsigned long)tctx->dev->addr_vir);
|
||||
return tctx->dev->disable_clk(tctx->dev);
|
||||
}
|
||||
|
||||
struct rk_crypto_tmp rk_ahash_sha1 = {
|
||||
.type = ALG_TYPE_HASH,
|
||||
.alg.hash = {
|
||||
.init = rk_ahash_init,
|
||||
.update = rk_ahash_update,
|
||||
.final = rk_ahash_final,
|
||||
.finup = rk_ahash_finup,
|
||||
.export = rk_ahash_export,
|
||||
.import = rk_ahash_import,
|
||||
.digest = rk_ahash_digest,
|
||||
.halg = {
|
||||
.digestsize = SHA1_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct sha1_state),
|
||||
.base = {
|
||||
.cra_name = "sha1",
|
||||
.cra_driver_name = "rk-sha1",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC |
|
||||
CRYPTO_ALG_NEED_FALLBACK,
|
||||
.cra_blocksize = SHA1_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_ahash_ctx),
|
||||
.cra_alignmask = 3,
|
||||
.cra_init = rk_cra_hash_init,
|
||||
.cra_exit = rk_cra_hash_exit,
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_ahash_sha256 = {
|
||||
.type = ALG_TYPE_HASH,
|
||||
.alg.hash = {
|
||||
.init = rk_ahash_init,
|
||||
.update = rk_ahash_update,
|
||||
.final = rk_ahash_final,
|
||||
.finup = rk_ahash_finup,
|
||||
.export = rk_ahash_export,
|
||||
.import = rk_ahash_import,
|
||||
.digest = rk_ahash_digest,
|
||||
.halg = {
|
||||
.digestsize = SHA256_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct sha256_state),
|
||||
.base = {
|
||||
.cra_name = "sha256",
|
||||
.cra_driver_name = "rk-sha256",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC |
|
||||
CRYPTO_ALG_NEED_FALLBACK,
|
||||
.cra_blocksize = SHA256_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_ahash_ctx),
|
||||
.cra_alignmask = 3,
|
||||
.cra_init = rk_cra_hash_init,
|
||||
.cra_exit = rk_cra_hash_exit,
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_ahash_md5 = {
|
||||
.type = ALG_TYPE_HASH,
|
||||
.alg.hash = {
|
||||
.init = rk_ahash_init,
|
||||
.update = rk_ahash_update,
|
||||
.final = rk_ahash_final,
|
||||
.finup = rk_ahash_finup,
|
||||
.export = rk_ahash_export,
|
||||
.import = rk_ahash_import,
|
||||
.digest = rk_ahash_digest,
|
||||
.halg = {
|
||||
.digestsize = MD5_DIGEST_SIZE,
|
||||
.statesize = sizeof(struct md5_state),
|
||||
.base = {
|
||||
.cra_name = "md5",
|
||||
.cra_driver_name = "rk-md5",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_ASYNC |
|
||||
CRYPTO_ALG_NEED_FALLBACK,
|
||||
.cra_blocksize = SHA1_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_ahash_ctx),
|
||||
.cra_alignmask = 3,
|
||||
.cra_init = rk_cra_hash_init,
|
||||
.cra_exit = rk_cra_hash_exit,
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
Loading…
Reference in New Issue
Block a user