AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

ARM: dts: exynos5250: add input clocks to audss clock controller

Browse Source 
Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This commit is contained in:
Andrew Bresticker 2013-09-25 14:12:50 -07:00 committed by Tomasz Figa
parent 35399dda01
commit c08ceea3a9
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -88,6 +88,8 @@ clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5250-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
timer {