forked from luck/tmp_suning_uos_patched
coresight: etm3x: moving etm_readl/writel to header file
Moving functions etm_readl/writel to file "coresight-etm.h" so that the main ETM3x driver can be split in more than one file. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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5da5325fa8
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@ -251,4 +251,33 @@ enum etm_addr_type {
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ETM_ADDR_TYPE_START,
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ETM_ADDR_TYPE_STOP,
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};
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static inline void etm_writel(struct etm_drvdata *drvdata,
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u32 val, u32 off)
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{
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if (drvdata->use_cp14) {
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if (etm_writel_cp14(off, val)) {
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dev_err(drvdata->dev,
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"invalid CP14 access to ETM reg: %#x", off);
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}
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} else {
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writel_relaxed(val, drvdata->base + off);
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}
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}
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static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
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{
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u32 val;
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if (drvdata->use_cp14) {
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if (etm_readl_cp14(off, &val)) {
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dev_err(drvdata->dev,
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"invalid CP14 access to ETM reg: %#x", off);
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}
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} else {
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val = readl_relaxed(drvdata->base + off);
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}
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return val;
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}
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#endif
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@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO);
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static int etm_count;
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static struct etm_drvdata *etmdrvdata[NR_CPUS];
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static inline void etm_writel(struct etm_drvdata *drvdata,
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u32 val, u32 off)
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{
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if (drvdata->use_cp14) {
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if (etm_writel_cp14(off, val)) {
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dev_err(drvdata->dev,
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"invalid CP14 access to ETM reg: %#x", off);
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}
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} else {
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writel_relaxed(val, drvdata->base + off);
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}
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}
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static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
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{
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u32 val;
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if (drvdata->use_cp14) {
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if (etm_readl_cp14(off, &val)) {
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dev_err(drvdata->dev,
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"invalid CP14 access to ETM reg: %#x", off);
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}
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} else {
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val = readl_relaxed(drvdata->base + off);
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}
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return val;
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}
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/*
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* Memory mapped writes to clear os lock are not supported on some processors
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* and OS lock must be unlocked before any memory mapped access on such
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