forked from luck/tmp_suning_uos_patched
sb_edac: convert driver to use the new edac ABI
The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
63b5d1d9aa
commit
c36e3e7768
@ -314,8 +314,6 @@ struct sbridge_pvt {
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struct sbridge_info info;
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struct sbridge_channel channel[NUM_CHANNELS];
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int csrow_map[NUM_CHANNELS][MAX_DIMMS];
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/* Memory type detection */
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bool is_mirrored, is_lockstep, is_close_pg;
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@ -487,29 +485,14 @@ static struct pci_dev *get_pdev_slot_func(u8 bus, unsigned slot,
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}
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/**
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* sbridge_get_active_channels() - gets the number of channels and csrows
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* check_if_ecc_is_active() - Checks if ECC is active
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* bus: Device bus
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* @channels: Number of channels that will be returned
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* @csrows: Number of csrows found
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*
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* Since EDAC core needs to know in advance the number of available channels
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* and csrows, in order to allocate memory for csrows/channels, it is needed
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* to run two similar steps. At the first step, implemented on this function,
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* it checks the number of csrows/channels present at one socket, identified
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* by the associated PCI bus.
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* this is used in order to properly allocate the size of mci components.
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* Note: one csrow is one dimm.
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*/
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static int sbridge_get_active_channels(const u8 bus, unsigned *channels,
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unsigned *csrows)
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static int check_if_ecc_is_active(const u8 bus)
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{
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struct pci_dev *pdev = NULL;
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int i, j;
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u32 mcmtr;
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*channels = 0;
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*csrows = 0;
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pdev = get_pdev_slot_func(bus, 15, 0);
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if (!pdev) {
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sbridge_printk(KERN_ERR, "Couldn't find PCI device "
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@ -523,41 +506,14 @@ static int sbridge_get_active_channels(const u8 bus, unsigned *channels,
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sbridge_printk(KERN_ERR, "ECC is disabled. Aborting\n");
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return -ENODEV;
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}
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for (i = 0; i < NUM_CHANNELS; i++) {
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u32 mtr;
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/* Device 15 functions 2 - 5 */
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pdev = get_pdev_slot_func(bus, 15, 2 + i);
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if (!pdev) {
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sbridge_printk(KERN_ERR, "Couldn't find PCI device "
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"%2x.%02d.%d!!!\n",
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bus, 15, 2 + i);
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return -ENODEV;
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}
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(*channels)++;
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for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) {
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pci_read_config_dword(pdev, mtr_regs[j], &mtr);
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debugf1("Bus#%02x channel #%d MTR%d = %x\n", bus, i, j, mtr);
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if (IS_DIMM_PRESENT(mtr))
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(*csrows)++;
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}
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}
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debugf0("Number of active channels: %d, number of active dimms: %d\n",
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*channels, *csrows);
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return 0;
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}
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static int get_dimm_config(struct mem_ctl_info *mci)
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{
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struct sbridge_pvt *pvt = mci->pvt_info;
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struct csrow_info *csr;
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struct dimm_info *dimm;
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int i, j, banks, ranks, rows, cols, size, npages;
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int csrow = 0;
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unsigned long last_page = 0;
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u32 reg;
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enum edac_type mode;
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enum mem_type mtype;
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@ -616,7 +572,8 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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u32 mtr;
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for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) {
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struct dimm_info *dimm = &mci->dimms[j];
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dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
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i, j, 0);
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pci_read_config_dword(pvt->pci_tad[i],
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mtr_regs[j], &mtr);
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debugf4("Channel #%d MTR%d = %x\n", i, j, mtr);
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@ -636,16 +593,6 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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size, npages,
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banks, ranks, rows, cols);
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/*
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* Fake stuff. This controller doesn't see
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* csrows.
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*/
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csr = &mci->csrows[csrow];
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pvt->csrow_map[i][j] = csrow;
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last_page += npages;
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csrow++;
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csr->channels[0].dimm = dimm;
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dimm->nr_pages = npages;
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dimm->grain = 32;
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dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4;
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@ -841,11 +788,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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u8 *socket,
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long *channel_mask,
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u8 *rank,
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char *area_type)
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char *area_type, char *msg)
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{
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struct mem_ctl_info *new_mci;
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struct sbridge_pvt *pvt = mci->pvt_info;
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char msg[256];
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int n_rir, n_sads, n_tads, sad_way, sck_xch;
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int sad_interl, idx, base_ch;
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int interleave_mode;
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@ -867,12 +813,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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*/
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if ((addr > (u64) pvt->tolm) && (addr < (1LL << 32))) {
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sprintf(msg, "Error at TOLM area, on addr 0x%08Lx", addr);
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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if (addr >= (u64)pvt->tohm) {
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sprintf(msg, "Error at MMIOH area, on addr 0x%016Lx", addr);
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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@ -889,7 +833,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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limit = SAD_LIMIT(reg);
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if (limit <= prv) {
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sprintf(msg, "Can't discover the memory socket");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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if (addr <= limit)
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@ -898,7 +841,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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}
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if (n_sads == MAX_SAD) {
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sprintf(msg, "Can't discover the memory socket");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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area_type = get_dram_attr(reg);
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@ -939,7 +881,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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break;
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default:
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sprintf(msg, "Can't discover socket interleave");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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*socket = sad_interleave[idx];
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@ -954,7 +895,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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if (!new_mci) {
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sprintf(msg, "Struct for socket #%u wasn't initialized",
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*socket);
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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mci = new_mci;
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@ -970,7 +910,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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limit = TAD_LIMIT(reg);
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if (limit <= prv) {
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sprintf(msg, "Can't discover the memory channel");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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if (addr <= limit)
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@ -1010,7 +949,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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break;
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default:
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sprintf(msg, "Can't discover the TAD target");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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*channel_mask = 1 << base_ch;
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@ -1024,7 +962,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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break;
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default:
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sprintf(msg, "Invalid mirror set. Can't decode addr");
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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} else
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@ -1052,7 +989,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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if (offset > addr) {
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sprintf(msg, "Can't calculate ch addr: TAD offset 0x%08Lx is too high for addr 0x%08Lx!",
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offset, addr);
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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addr -= offset;
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@ -1092,7 +1028,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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if (n_rir == MAX_RIR_RANGES) {
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sprintf(msg, "Can't discover the memory rank for ch addr 0x%08Lx",
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ch_addr);
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edac_mc_handle_ce_no_info(mci, msg);
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return -EINVAL;
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}
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rir_way = RIR_WAY(reg);
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@ -1406,7 +1341,8 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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{
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struct mem_ctl_info *new_mci;
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struct sbridge_pvt *pvt = mci->pvt_info;
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char *type, *optype, *msg, *recoverable_msg;
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enum hw_event_mc_err_type tp_event;
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char *type, *optype, msg[256], *recoverable_msg;
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bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0);
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bool overflow = GET_BITFIELD(m->status, 62, 62);
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bool uncorrected_error = GET_BITFIELD(m->status, 61, 61);
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@ -1418,13 +1354,21 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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u32 optypenum = GET_BITFIELD(m->status, 4, 6);
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long channel_mask, first_channel;
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u8 rank, socket;
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int csrow, rc, dimm;
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int rc, dimm;
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char *area_type = "Unknown";
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if (ripv)
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type = "NON_FATAL";
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else
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type = "FATAL";
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if (uncorrected_error) {
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if (ripv) {
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type = "FATAL";
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tp_event = HW_EVENT_ERR_FATAL;
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} else {
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type = "NON_FATAL";
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tp_event = HW_EVENT_ERR_UNCORRECTED;
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}
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} else {
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type = "CORRECTED";
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tp_event = HW_EVENT_ERR_CORRECTED;
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}
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/*
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* According with Table 15-9 of the Intel Archictecture spec vol 3A,
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@ -1442,19 +1386,19 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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} else {
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switch (optypenum) {
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case 0:
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optype = "generic undef request";
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optype = "generic undef request error";
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break;
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case 1:
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optype = "memory read";
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optype = "memory read error";
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break;
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case 2:
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optype = "memory write";
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optype = "memory write error";
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break;
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case 3:
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optype = "addr/cmd";
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optype = "addr/cmd error";
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break;
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case 4:
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optype = "memory scrubbing";
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optype = "memory scrubbing error";
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break;
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default:
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optype = "reserved";
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@ -1463,13 +1407,13 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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}
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rc = get_memory_error_data(mci, m->addr, &socket,
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&channel_mask, &rank, area_type);
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&channel_mask, &rank, area_type, msg);
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if (rc < 0)
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return;
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goto err_parsing;
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new_mci = get_mci_for_node_id(socket);
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if (!new_mci) {
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edac_mc_handle_ce_no_info(mci, "Error: socket got corrupted!");
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return;
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strcpy(msg, "Error: socket got corrupted!");
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goto err_parsing;
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}
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mci = new_mci;
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pvt = mci->pvt_info;
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@ -1483,8 +1427,6 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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else
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dimm = 2;
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csrow = pvt->csrow_map[first_channel][dimm];
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if (uncorrected_error && recoverable)
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recoverable_msg = " recoverable";
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else
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@ -1495,18 +1437,14 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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* Probably, we can just discard it, as the channel information
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* comes from the get_memory_error_data() address decoding
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*/
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msg = kasprintf(GFP_ATOMIC,
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"%d %s error(s): %s on %s area %s%s: cpu=%d Err=%04x:%04x (ch=%d), "
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"addr = 0x%08llx => socket=%d, Channel=%ld(mask=%ld), rank=%d\n",
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snprintf(msg, sizeof(msg),
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"%d error(s)%s: %s%s: cpu=%d Err=%04x:%04x addr = 0x%08llx socket=%d Channel=%ld(mask=%ld), rank=%d\n",
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core_err_cnt,
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overflow ? " OVERFLOW" : "",
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area_type,
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optype,
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type,
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recoverable_msg,
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overflow ? "OVERFLOW" : "",
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m->cpu,
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mscod, errcode,
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channel, /* 1111b means not specified */
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(long long) m->addr,
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socket,
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first_channel, /* This is the real channel on SB */
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@ -1515,13 +1453,19 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
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debugf0("%s", msg);
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/* Call the helper to output message */
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if (uncorrected_error)
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edac_mc_handle_fbd_ue(mci, csrow, 0, 0, msg);
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else
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edac_mc_handle_fbd_ce(mci, csrow, 0, msg);
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/* FIXME: need support for channel mask */
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/* Call the helper to output message */
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edac_mc_handle_error(tp_event, mci,
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m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0,
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channel, dimm, -1,
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optype, msg, m);
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return;
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err_parsing:
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edac_mc_handle_error(tp_event, mci, 0, 0, 0,
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-1, -1, -1,
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msg, "", m);
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kfree(msg);
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}
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/*
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@ -1680,16 +1624,25 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
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static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
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{
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struct mem_ctl_info *mci;
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struct edac_mc_layer layers[2];
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struct sbridge_pvt *pvt;
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int rc, channels, csrows;
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int rc;
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/* Check the number of active and not disabled channels */
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rc = sbridge_get_active_channels(sbridge_dev->bus, &channels, &csrows);
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rc = check_if_ecc_is_active(sbridge_dev->bus);
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if (unlikely(rc < 0))
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return rc;
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/* allocate a new MC control structure */
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mci = edac_mc_alloc(sizeof(*pvt), csrows, channels, sbridge_dev->mc);
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layers[0].type = EDAC_MC_LAYER_CHANNEL;
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layers[0].size = NUM_CHANNELS;
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layers[0].is_virt_csrow = false;
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layers[1].type = EDAC_MC_LAYER_SLOT;
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layers[1].size = MAX_DIMMS;
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layers[1].is_virt_csrow = true;
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mci = new_edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers,
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sizeof(*pvt));
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if (unlikely(!mci))
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return -ENOMEM;
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