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staging/iio fixes for 4.13-rc7

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Here are few small staging driver fixes, and some more IIO driver fixes
 for 4.13-rc7.  Nothing major, just resolutions for some reported
 problems.
 
 All of these have been in linux-next with no reported problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWaJy4A8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynWcACgxpL4f0LeykFayPprtrciey5OOGoAnAhfG7Lq
 LCuaIj8AtUVfwoWXVwBA
 =RSsO
 -----END PGP SIGNATURE-----

Merge tag 'staging-4.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging/iio fixes from Greg KH:
 "Here are few small staging driver fixes, and some more IIO driver
  fixes for 4.13-rc7. Nothing major, just resolutions for some reported
  problems.

  All of these have been in linux-next with no reported problems"

* tag 'staging-4.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
  iio: magnetometer: st_magn: remove ihl property for LSM303AGR
  iio: magnetometer: st_magn: fix status register address for LSM303AGR
  iio: hid-sensor-trigger: Fix the race with user space powering up sensors
  iio: trigger: stm32-timer: fix get trigger mode
  iio: imu: adis16480: Fix acceleration scale factor for adis16480
  PATCH] iio: Fix some documentation warnings
  staging: rtl8188eu: add RNX-N150NUB support
  Revert "staging: fsl-mc: be consistent when checking strcmp() return"
  iio: adc: stm32: fix common clock rate
  iio: adc: ina219: Avoid underflow for sleeping time
  iio: trigger: stm32-timer: add enable attribute
  iio: trigger: stm32-timer: fix get/set down count direction
  iio: trigger: stm32-timer: fix write_raw return value
  iio: trigger: stm32-timer: fix quadrature mode get routine
  iio: bmp280: properly initialize device for humidity reading
This commit is contained in:
Linus Torvalds 2017-08-27 17:03:33 -07:00
commit c3c162635f
12 changed files with 108 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/iio/adc/ina2xx-adc.c
View File

@ -644,7 +644,7 @@ static int ina2xx_capture_thread(void *data)
{
struct iio_dev *indio_dev = data;
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
unsigned int sampling_us = SAMPLING_PERIOD(chip);
int sampling_us = SAMPLING_PERIOD(chip);
int buffer_us;
/*

10
drivers/iio/adc/stm32-adc-core.c
View File

@ -64,7 +64,7 @@
#define STM32H7_CKMODE_MASK GENMASK(17, 16)
/* STM32 H7 maximum analog clock rate (from datasheet) */
#define STM32H7_ADC_MAX_CLK_RATE 72000000
#define STM32H7_ADC_MAX_CLK_RATE 36000000
/**
* stm32_adc_common_regs - stm32 common registers, compatible dependent data
@ -148,14 +148,14 @@ static int stm32f4_adc_clk_sel(struct platform_device *pdev,
return -EINVAL;
}
priv->common.rate = rate;
priv->common.rate = rate / stm32f4_pclk_div[i];
val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
val &= ~STM32F4_ADC_ADCPRE_MASK;
val |= i << STM32F4_ADC_ADCPRE_SHIFT;
writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR);
dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n",
rate / (stm32f4_pclk_div[i] * 1000));
priv->common.rate / 1000);
return 0;
}
@ -250,7 +250,7 @@ static int stm32h7_adc_clk_sel(struct platform_device *pdev,
out:
/* rate used later by each ADC instance to control BOOST mode */
priv->common.rate = rate;
priv->common.rate = rate / div;
/* Set common clock mode and prescaler */
val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR);
@ -260,7 +260,7 @@ static int stm32h7_adc_clk_sel(struct platform_device *pdev,
writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR);
dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n",
ckmode ? "bus" : "adc", div, rate / (div * 1000));
ckmode ? "bus" : "adc", div, priv->common.rate / 1000);
return 0;
}

8
drivers/iio/common/hid-sensors/hid-sensor-trigger.c
View File

@ -111,8 +111,6 @@ static int _hid_sensor_power_state(struct hid_sensor_common *st, bool state)
s32 poll_value = 0;
if (state) {
if (!atomic_read(&st->user_requested_state))
return 0;
if (sensor_hub_device_open(st->hsdev))
return -EIO;
@ -161,6 +159,9 @@ static int _hid_sensor_power_state(struct hid_sensor_common *st, bool state)
&report_val);
}
pr_debug("HID_SENSOR %s set power_state %d report_state %d\n",
st->pdev->name, state_val, report_val);
sensor_hub_get_feature(st->hsdev, st->power_state.report_id,
st->power_state.index,
sizeof(state_val), &state_val);
@ -182,6 +183,7 @@ int hid_sensor_power_state(struct hid_sensor_common *st, bool state)
ret = pm_runtime_get_sync(&st->pdev->dev);
else {
pm_runtime_mark_last_busy(&st->pdev->dev);
pm_runtime_use_autosuspend(&st->pdev->dev);
ret = pm_runtime_put_autosuspend(&st->pdev->dev);
}
if (ret < 0) {
@ -285,8 +287,6 @@ int hid_sensor_setup_trigger(struct iio_dev *indio_dev, const char *name,
/* Default to 3 seconds, but can be changed from sysfs */
pm_runtime_set_autosuspend_delay(&attrb->pdev->dev,
3000);
pm_runtime_use_autosuspend(&attrb->pdev->dev);
return ret;
error_unreg_trigger:
iio_trigger_unregister(trig);

2
drivers/iio/imu/adis16480.c
View File

@ -696,7 +696,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
.gyro_max_val = IIO_RAD_TO_DEGREE(22500),
.gyro_max_scale = 450,
.accel_max_val = IIO_M_S_2_TO_G(12500),
.accel_max_scale = 5,
.accel_max_scale = 10,
},
[ADIS16485] = {
.channels = adis16485_channels,

4
drivers/iio/magnetometer/st_magn_core.c
View File

@ -356,9 +356,7 @@ static const struct st_sensor_settings st_magn_sensors_settings[] = {
.drdy_irq = {
.addr = 0x62,
.mask_int1 = 0x01,
.addr_ihl = 0x63,
.mask_ihl = 0x04,
.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
.addr_stat_drdy = 0x67,
},
.multi_read_bit = false,
.bootime = 2,

27
drivers/iio/pressure/bmp280-core.c
View File

@ -282,6 +282,11 @@ static int bmp280_read_temp(struct bmp280_data *data,
}
adc_temp = be32_to_cpu(tmp) >> 12;
if (adc_temp == BMP280_TEMP_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading temperature skipped\n");
return -EIO;
}
comp_temp = bmp280_compensate_temp(data, adc_temp);
/*
@ -317,6 +322,11 @@ static int bmp280_read_press(struct bmp280_data *data,
}
adc_press = be32_to_cpu(tmp) >> 12;
if (adc_press == BMP280_PRESS_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading pressure skipped\n");
return -EIO;
}
comp_press = bmp280_compensate_press(data, adc_press);
*val = comp_press;
@ -345,6 +355,11 @@ static int bmp280_read_humid(struct bmp280_data *data, int *val, int *val2)
}
adc_humidity = be16_to_cpu(tmp);
if (adc_humidity == BMP280_HUMIDITY_SKIPPED) {
/* reading was skipped */
dev_err(data->dev, "reading humidity skipped\n");
return -EIO;
}
comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
*val = comp_humidity;
@ -597,14 +612,20 @@ static const struct bmp280_chip_info bmp280_chip_info = {
static int bme280_chip_config(struct bmp280_data *data)
{
int ret = bmp280_chip_config(data);
int ret;
u8 osrs = BMP280_OSRS_HUMIDITIY_X(data->oversampling_humid + 1);
/*
* Oversampling of humidity must be set before oversampling of
* temperature/pressure is set to become effective.
*/
ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
BMP280_OSRS_HUMIDITY_MASK, osrs);
if (ret < 0)
return ret;
return regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
BMP280_OSRS_HUMIDITY_MASK, osrs);
return bmp280_chip_config(data);
}
static const struct bmp280_chip_info bme280_chip_info = {

5
drivers/iio/pressure/bmp280.h
View File

@ -96,6 +96,11 @@
#define BME280_CHIP_ID 0x60
#define BMP280_SOFT_RESET_VAL 0xB6
/* BMP280 register skipped special values */
#define BMP280_TEMP_SKIPPED 0x80000
#define BMP280_PRESS_SKIPPED 0x80000
#define BMP280_HUMIDITY_SKIPPED 0x8000
/* Regmap configurations */
extern const struct regmap_config bmp180_regmap_config;
extern const struct regmap_config bmp280_regmap_config;

84
drivers/iio/trigger/stm32-timer-trigger.c
View File

@ -366,34 +366,32 @@ static int stm32_counter_read_raw(struct iio_dev *indio_dev,
int *val, int *val2, long mask)
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
u32 dat;
switch (mask) {
case IIO_CHAN_INFO_RAW:
{
u32 cnt;
regmap_read(priv->regmap, TIM_CNT, &cnt);
*val = cnt;
regmap_read(priv->regmap, TIM_CNT, &dat);
*val = dat;
return IIO_VAL_INT;
}
case IIO_CHAN_INFO_SCALE:
{
u32 smcr;
regmap_read(priv->regmap, TIM_SMCR, &smcr);
smcr &= TIM_SMCR_SMS;
case IIO_CHAN_INFO_ENABLE:
regmap_read(priv->regmap, TIM_CR1, &dat);
*val = (dat & TIM_CR1_CEN) ? 1 : 0;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
regmap_read(priv->regmap, TIM_SMCR, &dat);
dat &= TIM_SMCR_SMS;
*val = 1;
*val2 = 0;
/* in quadrature case scale = 0.25 */
if (smcr == 3)
if (dat == 3)
*val2 = 2;
return IIO_VAL_FRACTIONAL_LOG2;
}
}
return -EINVAL;
}
@ -403,15 +401,31 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev,
int val, int val2, long mask)
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
u32 dat;
switch (mask) {
case IIO_CHAN_INFO_RAW:
regmap_write(priv->regmap, TIM_CNT, val);
return regmap_write(priv->regmap, TIM_CNT, val);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
/* fixed scale */
return -EINVAL;
case IIO_CHAN_INFO_ENABLE:
if (val) {
regmap_read(priv->regmap, TIM_CR1, &dat);
if (!(dat & TIM_CR1_CEN))
clk_enable(priv->clk);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
TIM_CR1_CEN);
} else {
regmap_read(priv->regmap, TIM_CR1, &dat);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
0);
if (dat & TIM_CR1_CEN)
clk_disable(priv->clk);
}
return 0;
}
return -EINVAL;
@ -471,7 +485,7 @@ static int stm32_get_trigger_mode(struct iio_dev *indio_dev,
regmap_read(priv->regmap, TIM_SMCR, &smcr);
return smcr == TIM_SMCR_SMS ? 0 : -EINVAL;
return (smcr & TIM_SMCR_SMS) == TIM_SMCR_SMS ? 0 : -EINVAL;
}
static const struct iio_enum stm32_trigger_mode_enum = {
@ -507,9 +521,19 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev,
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
int sms = stm32_enable_mode2sms(mode);
u32 val;
if (sms < 0)
return sms;
/*
* Triggered mode sets CEN bit automatically by hardware. So, first
* enable counter clock, so it can use it. Keeps it in sync with CEN.
*/
if (sms == 6) {
regmap_read(priv->regmap, TIM_CR1, &val);
if (!(val & TIM_CR1_CEN))
clk_enable(priv->clk);
}
regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);
@ -571,11 +595,14 @@ static int stm32_get_quadrature_mode(struct iio_dev *indio_dev,
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
u32 smcr;
int mode;
regmap_read(priv->regmap, TIM_SMCR, &smcr);
smcr &= TIM_SMCR_SMS;
mode = (smcr & TIM_SMCR_SMS) - 1;
if ((mode < 0) || (mode > ARRAY_SIZE(stm32_quadrature_modes)))
return -EINVAL;
return smcr - 1;
return mode;
}
static const struct iio_enum stm32_quadrature_mode_enum = {
@ -592,13 +619,20 @@ static const char *const stm32_count_direction_states[] = {
static int stm32_set_count_direction(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int mode)
unsigned int dir)
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
u32 val;
int mode;
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR, mode);
/* In encoder mode, direction is RO (given by TI1/TI2 signals) */
regmap_read(priv->regmap, TIM_SMCR, &val);
mode = (val & TIM_SMCR_SMS) - 1;
if ((mode >= 0) || (mode < ARRAY_SIZE(stm32_quadrature_modes)))
return -EBUSY;
return 0;
return regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR,
dir ? TIM_CR1_DIR : 0);
}
static int stm32_get_count_direction(struct iio_dev *indio_dev,
@ -609,7 +643,7 @@ static int stm32_get_count_direction(struct iio_dev *indio_dev,
regmap_read(priv->regmap, TIM_CR1, &cr1);
return (cr1 & TIM_CR1_DIR);
return ((cr1 & TIM_CR1_DIR) ? 1 : 0);
}
static const struct iio_enum stm32_count_direction_enum = {
@ -672,7 +706,9 @@ static const struct iio_chan_spec_ext_info stm32_trigger_count_info[] = {
static const struct iio_chan_spec stm32_trigger_channel = {
.type = IIO_COUNT,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_ENABLE) |
BIT(IIO_CHAN_INFO_SCALE),
.ext_info = stm32_trigger_count_info,
.indexed = 1
};

6
drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
View File

@ -16,9 +16,9 @@
static bool __must_check fsl_mc_is_allocatable(const char *obj_type)
{
return strcmp(obj_type, "dpbp") ||
strcmp(obj_type, "dpmcp") ||
strcmp(obj_type, "dpcon");
return strcmp(obj_type, "dpbp") == 0 ||
strcmp(obj_type, "dpmcp") == 0 ||
strcmp(obj_type, "dpcon") == 0;
}
/**

1
drivers/staging/rtl8188eu/os_dep/usb_intf.c
View File

@ -45,6 +45,7 @@ static struct usb_device_id rtw_usb_id_tbl[] = {
{USB_DEVICE(0x2001, 0x3311)}, /* DLink GO-USB-N150 REV B1 */
{USB_DEVICE(0x2357, 0x010c)}, /* TP-Link TL-WN722N v2 */
{USB_DEVICE(0x0df6, 0x0076)}, /* Sitecom N150 v2 */
{USB_DEVICE(USB_VENDER_ID_REALTEK, 0xffef)}, /* Rosewill RNX-N150NUB */
{} /* Terminating entry */
};

2
include/linux/iio/iio.h
View File

@ -535,7 +535,7 @@ struct iio_buffer_setup_ops {
* @scan_timestamp: [INTERN] set if any buffers have requested timestamp
* @scan_index_timestamp:[INTERN] cache of the index to the timestamp
* @trig: [INTERN] current device trigger (buffer modes)
* @trig_readonly [INTERN] mark the current trigger immutable
* @trig_readonly: [INTERN] mark the current trigger immutable
* @pollfunc: [DRIVER] function run on trigger being received
* @pollfunc_event: [DRIVER] function run on events trigger being received
* @channels: [DRIVER] channel specification structure table

4
include/linux/iio/trigger.h
View File

@ -144,8 +144,8 @@ void devm_iio_trigger_unregister(struct device *dev,
/**
* iio_trigger_set_immutable() - set an immutable trigger on destination
*
* @indio_dev - IIO device structure containing the device
* @trig - trigger to assign to device
* @indio_dev: IIO device structure containing the device
* @trig: trigger to assign to device
*
**/
int iio_trigger_set_immutable(struct iio_dev *indio_dev, struct iio_trigger *trig);