forked from luck/tmp_suning_uos_patched
phy/marvell: add 88e1121 interface mode support
This patch adds support for RGMII RX/TX delay configuration on marvell 88e1121 and derivatives. With this patch, PHY_INTERFACE_MODE_RGMII_*ID modes are now supported on these devices. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -69,6 +69,12 @@
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#define MII_M1111_COPPER 0
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#define MII_M1111_FIBER 1
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#define MII_88E1121_PHY_MSCR_PAGE 2
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#define MII_88E1121_PHY_MSCR_REG 21
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#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
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#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
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#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
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#define MII_88E1121_PHY_LED_CTRL 16
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#define MII_88E1121_PHY_LED_PAGE 3
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#define MII_88E1121_PHY_LED_DEF 0x0030
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@ -180,7 +186,30 @@ static int marvell_config_aneg(struct phy_device *phydev)
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static int m88e1121_config_aneg(struct phy_device *phydev)
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{
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int err, temp;
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int err, oldpage, mscr;
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oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE);
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err = phy_write(phydev, MII_88E1121_PHY_PAGE,
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MII_88E1121_PHY_MSCR_PAGE);
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if (err < 0)
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return err;
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mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
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MII_88E1121_PHY_MSCR_DELAY_MASK;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
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MII_88E1121_PHY_MSCR_TX_DELAY);
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
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err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
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if (err < 0)
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return err;
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phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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@ -191,11 +220,11 @@ static int m88e1121_config_aneg(struct phy_device *phydev)
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if (err < 0)
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return err;
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temp = phy_read(phydev, MII_88E1121_PHY_PAGE);
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oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE);
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phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
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phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
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phy_write(phydev, MII_88E1121_PHY_PAGE, temp);
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phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
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err = genphy_config_aneg(phydev);
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