forked from luck/tmp_suning_uos_patched
[MIPS] Remove __flush_icache_page
__flash_icache_page is unused, so kill it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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1a6183f2e6
commit
c59a0f15be
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@ -268,26 +268,6 @@ static void r3k_flush_data_cache_page(unsigned long addr)
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{
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}
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static void r3k_flush_icache_page(struct vm_area_struct *vma, struct page *page)
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{
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struct mm_struct *mm = vma->vm_mm;
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unsigned long physpage;
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if (cpu_context(smp_processor_id(), mm) == 0)
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return;
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if (!(vma->vm_flags & VM_EXEC))
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return;
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#ifdef DEBUG_CACHE
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printk("cpage[%d,%08lx]", cpu_context(smp_processor_id(), mm), page);
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#endif
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physpage = (unsigned long) page_address(page);
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if (physpage)
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r3k_flush_icache_range(physpage, physpage + PAGE_SIZE);
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}
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static void r3k_flush_cache_sigtramp(unsigned long addr)
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{
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unsigned long flags;
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@ -335,7 +315,6 @@ void __init r3k_cache_init(void)
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flush_cache_mm = r3k_flush_cache_mm;
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flush_cache_range = r3k_flush_cache_range;
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flush_cache_page = r3k_flush_cache_page;
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__flush_icache_page = r3k_flush_icache_page;
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flush_icache_range = r3k_flush_icache_range;
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flush_cache_sigtramp = r3k_flush_cache_sigtramp;
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@ -551,82 +551,6 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
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instruction_hazard();
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}
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/*
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* Ok, this seriously sucks. We use them to flush a user page but don't
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* know the virtual address, so we have to blast away the whole icache
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* which is significantly more expensive than the real thing. Otoh we at
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* least know the kernel address of the page so we can flush it
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* selectivly.
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*/
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struct flush_icache_page_args {
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struct vm_area_struct *vma;
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struct page *page;
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};
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static inline void local_r4k_flush_icache_page(void *args)
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{
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struct flush_icache_page_args *fip_args = args;
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struct vm_area_struct *vma = fip_args->vma;
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struct page *page = fip_args->page;
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/*
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* Tricky ... Because we don't know the virtual address we've got the
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* choice of either invalidating the entire primary and secondary
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* caches or invalidating the secondary caches also. With the subset
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* enforcment on R4000SC, R4400SC, R10000 and R12000 invalidating the
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* secondary cache will result in any entries in the primary caches
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* also getting invalidated which hopefully is a bit more economical.
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*/
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if (cpu_has_inclusive_pcaches) {
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unsigned long addr = (unsigned long) page_address(page);
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r4k_blast_scache_page(addr);
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ClearPageDcacheDirty(page);
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return;
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}
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if (!cpu_has_ic_fills_f_dc) {
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unsigned long addr = (unsigned long) page_address(page);
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r4k_blast_dcache_page(addr);
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if (!cpu_icache_snoops_remote_store)
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r4k_blast_scache_page(addr);
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ClearPageDcacheDirty(page);
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}
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/*
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* We're not sure of the virtual address(es) involved here, so
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* we have to flush the entire I-cache.
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*/
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if (cpu_has_vtag_icache && vma->vm_mm == current->active_mm) {
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int cpu = smp_processor_id();
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if (cpu_context(cpu, vma->vm_mm) != 0)
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drop_mmu_context(vma->vm_mm, cpu);
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} else
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r4k_blast_icache();
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}
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static void r4k_flush_icache_page(struct vm_area_struct *vma,
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struct page *page)
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{
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struct flush_icache_page_args args;
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/*
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* If there's no context yet, or the page isn't executable, no I-cache
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* flush is needed.
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*/
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if (!(vma->vm_flags & VM_EXEC))
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return;
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args.vma = vma;
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args.page = page;
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r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
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}
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#ifdef CONFIG_DMA_NONCOHERENT
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static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
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@ -1291,7 +1215,6 @@ void __init r4k_cache_init(void)
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__flush_cache_all = r4k___flush_cache_all;
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flush_cache_mm = r4k_flush_cache_mm;
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flush_cache_page = r4k_flush_cache_page;
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__flush_icache_page = r4k_flush_icache_page;
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flush_cache_range = r4k_flush_cache_range;
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flush_cache_sigtramp = r4k_flush_cache_sigtramp;
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@ -306,66 +306,6 @@ void sb1_flush_icache_range(unsigned long start, unsigned long end)
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__attribute__((alias("local_sb1_flush_icache_range")));
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#endif
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/*
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* Flush the icache for a given physical page. Need to writeback the
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* dcache first, then invalidate the icache. If the page isn't
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* executable, nothing is required.
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*/
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static void local_sb1_flush_icache_page(struct vm_area_struct *vma,
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struct page *page)
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{
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unsigned long start;
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int cpu = smp_processor_id();
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#ifndef CONFIG_SMP
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if (!(vma->vm_flags & VM_EXEC))
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return;
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#endif
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/* Need to writeback any dirty data for that page, we have the PA */
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start = (unsigned long)(page-mem_map) << PAGE_SHIFT;
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__sb1_writeback_inv_dcache_phys_range(start, start + PAGE_SIZE);
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/*
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* If there's a context, bump the ASID (cheaper than a flush,
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* since we don't know VAs!)
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*/
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if (vma->vm_mm == current->active_mm) {
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if (cpu_context(cpu, vma->vm_mm) != 0)
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drop_mmu_context(vma->vm_mm, cpu);
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} else
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__sb1_flush_icache_range(start, start + PAGE_SIZE);
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}
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#ifdef CONFIG_SMP
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struct flush_icache_page_args {
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struct vm_area_struct *vma;
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struct page *page;
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};
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static void sb1_flush_icache_page_ipi(void *info)
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{
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struct flush_icache_page_args *args = info;
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local_sb1_flush_icache_page(args->vma, args->page);
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}
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/* Dirty dcache could be on another CPU, so do the IPIs */
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static void sb1_flush_icache_page(struct vm_area_struct *vma,
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struct page *page)
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{
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struct flush_icache_page_args args;
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if (!(vma->vm_flags & VM_EXEC))
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return;
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args.vma = vma;
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args.page = page;
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on_each_cpu(sb1_flush_icache_page_ipi, (void *) &args, 1, 1);
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}
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#else
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void sb1_flush_icache_page(struct vm_area_struct *vma, struct page *page)
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__attribute__((alias("local_sb1_flush_icache_page")));
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#endif
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/*
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* A signal trampoline must fit into a single cacheline.
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*/
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@ -526,7 +466,6 @@ void sb1_cache_init(void)
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/* These routines are for Icache coherence with the Dcache */
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flush_icache_range = sb1_flush_icache_range;
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__flush_icache_page = sb1_flush_icache_page;
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flush_icache_all = __sb1_flush_icache_all; /* local only */
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/* This implies an Icache flush too, so can't be nop'ed */
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@ -248,33 +248,6 @@ static void tx39_flush_icache_range(unsigned long start, unsigned long end)
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}
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}
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/*
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* Ok, this seriously sucks. We use them to flush a user page but don't
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* know the virtual address, so we have to blast away the whole icache
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* which is significantly more expensive than the real thing. Otoh we at
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* least know the kernel address of the page so we can flush it
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* selectivly.
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*/
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static void tx39_flush_icache_page(struct vm_area_struct *vma, struct page *page)
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{
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unsigned long addr;
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/*
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* If there's no context yet, or the page isn't executable, no icache
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* flush is needed.
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*/
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if (!(vma->vm_flags & VM_EXEC))
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return;
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addr = (unsigned long) page_address(page);
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tx39_blast_dcache_page(addr);
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/*
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* We're not sure of the virtual address(es) involved here, so
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* we have to flush the entire I-cache.
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*/
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tx39_blast_icache();
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}
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static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size)
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{
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unsigned long end;
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@ -382,7 +355,6 @@ void __init tx39_cache_init(void)
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flush_cache_mm = (void *) tx39h_flush_icache_all;
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flush_cache_range = (void *) tx39h_flush_icache_all;
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flush_cache_page = (void *) tx39h_flush_icache_all;
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__flush_icache_page = (void *) tx39h_flush_icache_all;
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flush_icache_range = (void *) tx39h_flush_icache_all;
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flush_cache_sigtramp = (void *) tx39h_flush_icache_all;
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@ -408,7 +380,6 @@ void __init tx39_cache_init(void)
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flush_cache_mm = tx39_flush_cache_mm;
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flush_cache_range = tx39_flush_cache_range;
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flush_cache_page = tx39_flush_cache_page;
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__flush_icache_page = tx39_flush_icache_page;
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flush_icache_range = tx39_flush_icache_range;
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flush_cache_sigtramp = tx39_flush_cache_sigtramp;
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@ -25,7 +25,6 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
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void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
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unsigned long pfn);
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void (*flush_icache_range)(unsigned long start, unsigned long end);
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void (*__flush_icache_page)(struct vm_area_struct *vma, struct page *page);
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/* MIPS specific cache operations */
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void (*flush_cache_sigtramp)(unsigned long addr);
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@ -46,8 +46,6 @@ static inline void flush_dcache_page(struct page *page)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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extern void (*__flush_icache_page)(struct vm_area_struct *vma,
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struct page *page);
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static inline void flush_icache_page(struct vm_area_struct *vma,
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struct page *page)
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{
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