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ARM: davinci: clk framework support for enable/disable functionality

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DaVinci clock implementation does not support clock enable/disable
functionality on non-PSC clock nodes.

On DA850 SoC, EHRPWM module requires support for enable/disable
of TBCLK controlled using a system module register.

This patch adds a method for enabling/disabling non-PSC clocks
into DaVinci clock implementation.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Philip Avinash 2013-03-25 15:07:48 +05:30 committed by Sekhar Nori
parent 07961ac7c0
commit c6007ffe84
2 changed files with 16 additions and 7 deletions
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21
arch/arm/mach-davinci/clock.c
View File

@ -35,19 +35,26 @@ static void __clk_enable(struct clk *clk)
{ {
if (clk->parent) if (clk->parent)
__clk_enable(clk->parent); __clk_enable(clk->parent);
if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) if (clk->usecount++ == 0) {
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, if (clk->flags & CLK_PSC)
true, clk->flags); davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
true, clk->flags);
else if (clk->clk_enable)
clk->clk_enable(clk);
}
} }
static void __clk_disable(struct clk *clk) static void __clk_disable(struct clk *clk)
{ {
if (WARN_ON(clk->usecount == 0)) if (WARN_ON(clk->usecount == 0))
return; return;
if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && if (--clk->usecount == 0) {
(clk->flags & CLK_PSC)) if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
false, clk->flags); false, clk->flags);
else if (clk->clk_disable)
clk->clk_disable(clk);
}
if (clk->parent) if (clk->parent)
__clk_disable(clk->parent); __clk_disable(clk->parent);
} }

2
arch/arm/mach-davinci/clock.h
View File

@ -104,6 +104,8 @@ struct clk {
int (*set_rate) (struct clk *clk, unsigned long rate); int (*set_rate) (struct clk *clk, unsigned long rate);
int (*round_rate) (struct clk *clk, unsigned long rate); int (*round_rate) (struct clk *clk, unsigned long rate);
int (*reset) (struct clk *clk, bool reset); int (*reset) (struct clk *clk, bool reset);
void (*clk_enable) (struct clk *clk);
void (*clk_disable) (struct clk *clk);
}; };
/* Clock flags: SoC-specific flags start at BIT(16) */ /* Clock flags: SoC-specific flags start at BIT(16) */