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[ARM] 4560/1: pxa: move processor specific set_wake logic out of irq.c

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a function pxa_init_irq_set_wake() was introduced, so that
processor specific code could install their own version

code setting PFER and PRER registers within pxa_gpio_irq_type
are removed, and the edge configuration is postponed to the
(*set_wake) and copies the GRER and GFER register, which will
always be set up correctly by pxa_gpio_irq_type()

Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
eric miao 2007-08-29 10:22:17 +01:00 committed by Russell King
parent 30f0b40844
commit c95530c779
4 changed files with 116 additions and 73 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-pxa/generic.h
View File

@ -15,6 +15,7 @@ extern struct sys_timer pxa_timer;
extern void __init pxa_init_irq_low(void);
extern void __init pxa_init_irq_high(void);
extern void __init pxa_init_irq_gpio(int gpio_nr);
extern void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int));
extern void __init pxa25x_init_irq(void);
extern void __init pxa27x_init_irq(void);
extern void __init pxa_map_io(void);

76
arch/arm/mach-pxa/irq.c
View File

@ -38,33 +38,11 @@ static void pxa_unmask_low_irq(unsigned int irq)
ICMR |= (1 << irq);
}
static int pxa_set_wake(unsigned int irq, unsigned int on)
{
u32 mask;
switch (irq) {
case IRQ_RTCAlrm:
mask = PWER_RTC;
break;
#ifdef CONFIG_PXA27x
/* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */
#endif
default:
return -EINVAL;
}
if (on)
PWER |= mask;
else
PWER &= ~mask;
return 0;
}
static struct irq_chip pxa_internal_chip_low = {
.name = "SC",
.ack = pxa_mask_low_irq,
.mask = pxa_mask_low_irq,
.unmask = pxa_unmask_low_irq,
.set_wake = pxa_set_wake,
};
void __init pxa_init_irq_low(void)
@ -125,26 +103,6 @@ void __init pxa_init_irq_high(void)
}
#endif
/* Note that if an input/irq line ever gets changed to an output during
* suspend, the relevant PWER, PRER, and PFER bits should be cleared.
*/
#ifdef CONFIG_PXA27x
/* PXA27x: Various gpios can issue wakeup events. This logic only
* handles the simple cases, not the WEMUX2 and WEMUX3 options
*/
#define PXA27x_GPIO_NOWAKE_MASK \
((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2))
#define WAKEMASK(gpio) \
(((gpio) <= 15) \
? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \
: ((gpio == 35) ? (1 << 24) : 0))
#else
/* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */
#define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0)
#endif
/*
* PXA GPIO edge detection for IRQs:
* IRQs are generated on Falling-Edge, Rising-Edge, or both.
@ -158,11 +116,9 @@ static long GPIO_IRQ_mask[4];
static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
{
int gpio, idx;
u32 mask;
gpio = IRQ_TO_GPIO(irq);
idx = gpio >> 5;
mask = WAKEMASK(gpio);
if (type == IRQT_PROBE) {
/* Don't mess with enabled GPIOs using preconfigured edges or
@ -182,19 +138,15 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
if (type & __IRQT_RISEDGE) {
/* printk("rising "); */
__set_bit (gpio, GPIO_IRQ_rising_edge);
PRER |= mask;
} else {
__clear_bit (gpio, GPIO_IRQ_rising_edge);
PRER &= ~mask;
}
if (type & __IRQT_FALEDGE) {
/* printk("falling "); */
__set_bit (gpio, GPIO_IRQ_falling_edge);
PFER |= mask;
} else {
__clear_bit (gpio, GPIO_IRQ_falling_edge);
PFER &= ~mask;
}
/* printk("edges\n"); */
@ -213,29 +165,12 @@ static void pxa_ack_low_gpio(unsigned int irq)
GEDR0 = (1 << (irq - IRQ_GPIO0));
}
static int pxa_set_gpio_wake(unsigned int irq, unsigned int on)
{
int gpio = IRQ_TO_GPIO(irq);
u32 mask = WAKEMASK(gpio);
if (!mask)
return -EINVAL;
if (on)
PWER |= mask;
else
PWER &= ~mask;
return 0;
}
static struct irq_chip pxa_low_gpio_chip = {
.name = "GPIO-l",
.ack = pxa_ack_low_gpio,
.mask = pxa_mask_low_irq,
.unmask = pxa_unmask_low_irq,
.set_type = pxa_gpio_irq_type,
.set_wake = pxa_set_gpio_wake,
};
/*
@ -342,7 +277,6 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.mask = pxa_mask_muxed_gpio,
.unmask = pxa_unmask_muxed_gpio,
.set_type = pxa_gpio_irq_type,
.set_wake = pxa_set_gpio_wake,
};
void __init pxa_init_irq_gpio(int gpio_nr)
@ -377,3 +311,13 @@ void __init pxa_init_irq_gpio(int gpio_nr)
set_irq_chip(IRQ_GPIO_2_x, &pxa_internal_chip_low);
set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler);
}
void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int))
{
pxa_internal_chip_low.set_wake = set_wake;
#ifdef CONFIG_PXA27x
pxa_internal_chip_high.set_wake = set_wake;
#endif
pxa_low_gpio_chip.set_wake = set_wake;
pxa_muxed_gpio_chip.set_wake = set_wake;
}

42
arch/arm/mach-pxa/pxa25x.c
View File

@ -227,10 +227,52 @@ static void __init pxa25x_init_pm(void)
}
#endif
/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
*/
static int pxa25x_set_wake(unsigned int irq, unsigned int on)
{
int gpio = IRQ_TO_GPIO(irq);
uint32_t gpio_bit, mask = 0;
if (gpio >= 0 && gpio <= 15) {
gpio_bit = GPIO_bit(gpio);
mask = gpio_bit;
if (on) {
if (GRER(gpio) | gpio_bit)
PRER |= gpio_bit;
else
PRER &= ~gpio_bit;
if (GFER(gpio) | gpio_bit)
PFER |= gpio_bit;
else
PFER &= ~gpio_bit;
}
goto set_pwer;
}
if (irq == IRQ_RTCAlrm) {
mask = PWER_RTC;
goto set_pwer;
}
return -EINVAL;
set_pwer:
if (on)
PWER |= mask;
else
PWER &=~mask;
return 0;
}
void __init pxa25x_init_irq(void)
{
pxa_init_irq_low();
pxa_init_irq_gpio(85);
pxa_init_irq_set_wake(pxa25x_set_wake);
}
static struct platform_device *pxa25x_devices[] __initdata = {

70
arch/arm/mach-pxa/pxa27x.c
View File

@ -306,6 +306,69 @@ static void __init pxa27x_init_pm(void)
}
#endif
/* PXA27x: Various gpios can issue wakeup events. This logic only
* handles the simple cases, not the WEMUX2 and WEMUX3 options
*/
#define PXA27x_GPIO_NOWAKE_MASK \
((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2))
#define WAKEMASK(gpio) \
(((gpio) <= 15) \
? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \
: ((gpio == 35) ? (1 << 24) : 0))
static int pxa27x_set_wake(unsigned int irq, unsigned int on)
{
int gpio = IRQ_TO_GPIO(irq);
uint32_t mask;
if ((gpio >= 0 && gpio <= 15) || (gpio == 35)) {
if (WAKEMASK(gpio) == 0)
return -EINVAL;
mask = WAKEMASK(gpio);
if (on) {
if (GRER(gpio) | GPIO_bit(gpio))
PRER |= mask;
else
PRER &= ~mask;
if (GFER(gpio) | GPIO_bit(gpio))
PFER |= mask;
else
PFER &= ~mask;
}
goto set_pwer;
}
switch (irq) {
case IRQ_RTCAlrm:
mask = PWER_RTC;
break;
case IRQ_USB:
mask = 1u << 26;
break;
default:
return -EINVAL;
}
set_pwer:
if (on)
PWER |= mask;
else
PWER &=~mask;
return 0;
}
void __init pxa27x_init_irq(void)
{
pxa_init_irq_low();
pxa_init_irq_high();
pxa_init_irq_gpio(128);
pxa_init_irq_set_wake(pxa27x_set_wake);
}
/*
* device registration specific to PXA27x.
*/
@ -375,13 +438,6 @@ static struct platform_device *devices[] __initdata = {
&pxa27x_device_ohci,
};
void __init pxa27x_init_irq(void)
{
pxa_init_irq_low();
pxa_init_irq_high();
pxa_init_irq_gpio(128);
}
static int __init pxa27x_init(void)
{
int ret = 0;