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[ARM] 3414/1: ep93xx: reset ethernet controller before uncompressing

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Patch from Lennert Buytenhek

The Redboot version that cirrus supplies for the cirrus ep93xx doesn't
turn off DMA from the ethernet MAC before jumping to linux, which means
that we might end up with bits of RX status and packet data scribbled
over the uncompressed kernel image.

Work around this by resetting the ethernet MAC before we uncompress.

We don't usually work around bootloader bugs, but considering that the
large majority of ep93xx boards out there have this problem, I figured
this it was justified in this case.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek 2006-03-26 21:40:27 +01:00 committed by Russell King
parent 36ddf5bbde
commit c9b4470e2d
1 changed files with 39 additions and 1 deletions
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40
include/asm-arm/arch-ep93xx/uncompress.h
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@ -16,11 +16,21 @@ static unsigned char __raw_readb(unsigned int ptr)
return *((volatile unsigned char *)ptr);
}
static unsigned int __raw_readl(unsigned int ptr)
{
return *((volatile unsigned int *)ptr);
}
static void __raw_writeb(unsigned char value, unsigned int ptr)
{
*((volatile unsigned char *)ptr) = value;
}
static void __raw_writel(unsigned int value, unsigned int ptr)
{
*((volatile unsigned int *)ptr) = value;
}
#define PHYS_UART1_DATA 0x808c0000
#define PHYS_UART1_FLAG 0x808c0018
@ -49,5 +59,33 @@ static void putstr(const char *s)
}
}
#define arch_decomp_setup()
/*
* Some bootloaders don't turn off DMA from the ethernet MAC before
* jumping to linux, which means that we might end up with bits of RX
* status and packet data scribbled over the uncompressed kernel image.
* Work around this by resetting the ethernet MAC before we uncompress.
*/
#define PHYS_ETH_SELF_CTL 0x80010020
#define ETH_SELF_CTL_RESET 0x00000001
static void ethernet_reset(void)
{
unsigned int v;
/* Reset the ethernet MAC. */
v = __raw_readl(PHYS_ETH_SELF_CTL);
__raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
/* Wait for reset to finish. */
while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
;
}
static void arch_decomp_setup(void)
{
ethernet_reset();
}
#define arch_decomp_wdog()