forked from luck/tmp_suning_uos_patched
[PATCH] Kprobes/IA64: support kprobe on branch/call instructions
This patch is required to support kprobe on branch/call instructions. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Anil S Keshavamurthy
Linus Torvalds
parent
b2761dc262
commit
cd2675bf65
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@ -120,25 +120,75 @@ void arch_arm_kprobe(struct kprobe *p)
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unsigned long arm_addr = addr & ~0xFULL;
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unsigned long slot = addr & 0xf;
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unsigned long template;
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unsigned long major_opcode = 0;
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unsigned long lx_type_inst = 0;
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unsigned long kprobe_inst = 0;
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bundle_t bundle;
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memcpy(&bundle, &p->ainsn.insn.bundle, sizeof(bundle_t));
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p->ainsn.inst_flag = 0;
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p->ainsn.target_br_reg = 0;
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memcpy(&bundle, &p->ainsn.insn.bundle, sizeof(bundle_t));
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template = bundle.quad0.template;
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if (slot == 1 && bundle_encoding[template][1] == L) {
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lx_type_inst = 1;
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slot = 2;
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}
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template = bundle.quad0.template;
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if (slot == 1 && bundle_encoding[template][1] == L)
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slot = 2;
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switch (slot) {
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case 0:
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major_opcode = (bundle.quad0.slot0 >> SLOT0_OPCODE_SHIFT);
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kprobe_inst = bundle.quad0.slot0;
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bundle.quad0.slot0 = BREAK_INST;
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break;
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case 1:
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major_opcode = (bundle.quad1.slot1_p1 >> SLOT1_p1_OPCODE_SHIFT);
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kprobe_inst = (bundle.quad0.slot1_p0 |
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(bundle.quad1.slot1_p1 << (64-46)));
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bundle.quad0.slot1_p0 = BREAK_INST;
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bundle.quad1.slot1_p1 = (BREAK_INST >> (64-46));
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break;
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case 2:
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major_opcode = (bundle.quad1.slot2 >> SLOT2_OPCODE_SHIFT);
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kprobe_inst = bundle.quad1.slot2;
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bundle.quad1.slot2 = BREAK_INST;
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break;
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}
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/*
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* Look for IP relative Branches, IP relative call or
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* IP relative predicate instructions
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*/
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if (bundle_encoding[template][slot] == B) {
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switch (major_opcode) {
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case INDIRECT_CALL_OPCODE:
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p->ainsn.inst_flag |= INST_FLAG_FIX_BRANCH_REG;
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p->ainsn.target_br_reg = ((kprobe_inst >> 6) & 0x7);
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break;
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case IP_RELATIVE_PREDICT_OPCODE:
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case IP_RELATIVE_BRANCH_OPCODE:
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p->ainsn.inst_flag |= INST_FLAG_FIX_RELATIVE_IP_ADDR;
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break;
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case IP_RELATIVE_CALL_OPCODE:
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p->ainsn.inst_flag |= INST_FLAG_FIX_RELATIVE_IP_ADDR;
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p->ainsn.inst_flag |= INST_FLAG_FIX_BRANCH_REG;
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p->ainsn.target_br_reg = ((kprobe_inst >> 6) & 0x7);
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break;
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default:
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/* Do nothing */
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break;
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}
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} else if (lx_type_inst) {
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switch (major_opcode) {
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case LONG_CALL_OPCODE:
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p->ainsn.inst_flag |= INST_FLAG_FIX_BRANCH_REG;
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p->ainsn.target_br_reg = ((kprobe_inst >> 6) & 0x7);
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break;
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default:
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/* Do nothing */
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break;
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}
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}
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/* Flush icache for the instruction at the emulated address */
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flush_icache_range((unsigned long)&p->ainsn.insn.bundle,
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@ -170,24 +220,75 @@ void arch_remove_kprobe(struct kprobe *p)
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* We are resuming execution after a single step fault, so the pt_regs
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* structure reflects the register state after we executed the instruction
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* located in the kprobe (p->ainsn.insn.bundle). We still need to adjust
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* the ip to point back to the original stack address, and if we see that
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* the slot has incremented back to zero, then we need to point to the next
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* slot location.
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* the ip to point back to the original stack address. To set the IP address
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* to original stack address, handle the case where we need to fixup the
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* relative IP address and/or fixup branch register.
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*/
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static void resume_execution(struct kprobe *p, struct pt_regs *regs)
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{
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unsigned long bundle = (unsigned long)p->addr & ~0xFULL;
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unsigned long bundle_addr = ((unsigned long) (&p->ainsn.insn.bundle)) & ~0xFULL;
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unsigned long resume_addr = (unsigned long)p->addr & ~0xFULL;
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unsigned long template;
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int slot = ((unsigned long)p->addr & 0xf);
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/*
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* TODO: Handle cases where kprobe was inserted on a branch instruction
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*/
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template = p->opcode.bundle.quad0.template;
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if (!ia64_psr(regs)->ri)
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regs->cr_iip = bundle + 0x10;
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else
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regs->cr_iip = bundle;
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if (slot == 1 && bundle_encoding[template][1] == L)
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slot = 2;
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ia64_psr(regs)->ss = 0;
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if (p->ainsn.inst_flag) {
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if (p->ainsn.inst_flag & INST_FLAG_FIX_RELATIVE_IP_ADDR) {
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/* Fix relative IP address */
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regs->cr_iip = (regs->cr_iip - bundle_addr) + resume_addr;
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}
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if (p->ainsn.inst_flag & INST_FLAG_FIX_BRANCH_REG) {
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/*
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* Fix target branch register, software convention is
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* to use either b0 or b6 or b7, so just checking
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* only those registers
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*/
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switch (p->ainsn.target_br_reg) {
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case 0:
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if ((regs->b0 == bundle_addr) ||
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(regs->b0 == bundle_addr + 0x10)) {
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regs->b0 = (regs->b0 - bundle_addr) +
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resume_addr;
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}
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break;
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case 6:
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if ((regs->b6 == bundle_addr) ||
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(regs->b6 == bundle_addr + 0x10)) {
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regs->b6 = (regs->b6 - bundle_addr) +
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resume_addr;
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}
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break;
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case 7:
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if ((regs->b7 == bundle_addr) ||
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(regs->b7 == bundle_addr + 0x10)) {
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regs->b7 = (regs->b7 - bundle_addr) +
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resume_addr;
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}
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break;
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} /* end switch */
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}
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goto turn_ss_off;
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}
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if (slot == 2) {
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if (regs->cr_iip == bundle_addr + 0x10) {
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regs->cr_iip = resume_addr + 0x10;
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}
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} else {
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if (regs->cr_iip == bundle_addr) {
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regs->cr_iip = resume_addr;
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}
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}
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turn_ss_off:
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/* Turn off Single Step bit */
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ia64_psr(regs)->ss = 0;
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}
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static void prepare_ss(struct kprobe *p, struct pt_regs *regs)
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@ -44,6 +44,17 @@ typedef struct _bundle {
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#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)pentry
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#define SLOT0_OPCODE_SHIFT (37)
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#define SLOT1_p1_OPCODE_SHIFT (37 - (64-46))
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#define SLOT2_OPCODE_SHIFT (37)
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#define INDIRECT_CALL_OPCODE (1)
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#define IP_RELATIVE_CALL_OPCODE (5)
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#define IP_RELATIVE_BRANCH_OPCODE (4)
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#define IP_RELATIVE_PREDICT_OPCODE (7)
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#define LONG_BRANCH_OPCODE (0xC)
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#define LONG_CALL_OPCODE (0xD)
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typedef struct kprobe_opcode {
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bundle_t bundle;
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} kprobe_opcode_t;
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@ -55,8 +66,12 @@ struct fnptr {
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/* Architecture specific copy of original instruction*/
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struct arch_specific_insn {
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/* copy of the original instruction */
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/* copy of the instruction to be emulated */
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kprobe_opcode_t insn;
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#define INST_FLAG_FIX_RELATIVE_IP_ADDR 1
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#define INST_FLAG_FIX_BRANCH_REG 2
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unsigned long inst_flag;
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unsigned short target_br_reg;
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};
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/* ia64 does not need this */
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