forked from luck/tmp_suning_uos_patched
dmfe: Fix link detection
Add link detection Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com> Cc: Valerie Henson <val_henson@linux.intel.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -248,7 +248,6 @@ struct dmfe_board_info {
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u8 media_mode; /* user specify media mode */
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u8 op_mode; /* real work media mode */
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u8 phy_addr;
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u8 link_failed; /* Ever link failed */
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u8 wait_reset; /* Hardware failed, need to reset */
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u8 dm910x_chk_mode; /* Operating mode check */
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u8 first_in_callback; /* Flag to record state */
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@ -447,6 +446,7 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
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dev->poll_controller = &poll_dmfe;
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#endif
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dev->ethtool_ops = &netdev_ethtool_ops;
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netif_carrier_off(dev);
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spin_lock_init(&db->lock);
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pci_read_config_dword(pdev, 0x50, &pci_pmr);
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@ -541,7 +541,6 @@ static int dmfe_open(struct DEVICE *dev)
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db->tx_packet_cnt = 0;
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db->tx_queue_cnt = 0;
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db->rx_avail_cnt = 0;
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db->link_failed = 1;
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db->wait_reset = 0;
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db->first_in_callback = 0;
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@ -1082,6 +1081,7 @@ static void netdev_get_drvinfo(struct net_device *dev,
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static const struct ethtool_ops netdev_ethtool_ops = {
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.get_drvinfo = netdev_get_drvinfo,
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.get_link = ethtool_op_get_link,
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};
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/*
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@ -1097,6 +1097,8 @@ static void dmfe_timer(unsigned long data)
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struct dmfe_board_info *db = netdev_priv(dev);
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unsigned long flags;
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int link_ok, link_ok_phy;
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DMFE_DBUG(0, "dmfe_timer()", 0);
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spin_lock_irqsave(&db->lock, flags);
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@ -1168,15 +1170,35 @@ static void dmfe_timer(unsigned long data)
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(db->chip_revision == 0x02000010)) ) {
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/* DM9102A Chip */
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if (tmp_cr12 & 2)
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tmp_cr12 = 0x0; /* Link failed */
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link_ok = 0;
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else
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tmp_cr12 = 0x3; /* Link OK */
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link_ok = 1;
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}
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else
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/*0x43 is used instead of 0x3 because bit 6 should represent
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link status of external PHY */
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link_ok = (tmp_cr12 & 0x43) ? 1 : 0;
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if ( !(tmp_cr12 & 0x3) && !db->link_failed ) {
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/* If chip reports that link is failed it could be because external
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PHY link status pin is not conected correctly to chip
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To be sure ask PHY too.
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*/
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/* need a dummy read because of PHY's register latch*/
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phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id);
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link_ok_phy = (phy_read (db->ioaddr,
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db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0;
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if (link_ok_phy != link_ok) {
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DMFE_DBUG (0, "PHY and chip report different link status", 0);
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link_ok = link_ok | link_ok_phy;
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}
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if ( !link_ok && netif_carrier_ok(dev)) {
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/* Link Failed */
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DMFE_DBUG(0, "Link Failed", tmp_cr12);
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db->link_failed = 1;
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netif_carrier_off(dev);
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/* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */
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/* AUTO or force 1M Homerun/Longrun don't need */
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@ -1191,19 +1213,19 @@ static void dmfe_timer(unsigned long data)
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db->cr6_data&=~0x00000200; /* bit9=0, HD mode */
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update_cr6(db->cr6_data, db->ioaddr);
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}
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} else
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if ((tmp_cr12 & 0x3) && db->link_failed) {
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DMFE_DBUG(0, "Link link OK", tmp_cr12);
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db->link_failed = 0;
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} else if (!netif_carrier_ok(dev)) {
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/* Auto Sense Speed */
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if ( (db->media_mode & DMFE_AUTO) &&
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dmfe_sense_speed(db) )
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db->link_failed = 1;
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dmfe_process_mode(db);
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/* SHOW_MEDIA_TYPE(db->op_mode); */
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DMFE_DBUG(0, "Link link OK", tmp_cr12);
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/* Auto Sense Speed */
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if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) {
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netif_carrier_on(dev);
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SHOW_MEDIA_TYPE(db->op_mode);
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}
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dmfe_process_mode(db);
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}
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/* HPNA remote command check */
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if (db->HPNA_command & 0xf00) {
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db->HPNA_timer--;
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@ -1248,7 +1270,7 @@ static void dmfe_dynamic_reset(struct DEVICE *dev)
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db->tx_packet_cnt = 0;
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db->tx_queue_cnt = 0;
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db->rx_avail_cnt = 0;
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db->link_failed = 1;
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netif_carrier_off(dev);
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db->wait_reset = 0;
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/* Re-initilize DM910X board */
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