forked from luck/tmp_suning_uos_patched
KVM: X86: Micro-optimize IPI fastpath delay
This patch optimizes the virtual IPI fastpath emulation sequence: write ICR2 send virtual IPI read ICR2 write ICR2 send virtual IPI ==> write ICR write ICR We can observe ~0.67% performance improvement for IPI microbenchmark (https://lore.kernel.org/kvm/20171219085010.4081-1-ynorov@caviumnetworks.com/) on Skylake server. Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1585189202-1708-4-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1241,7 +1241,7 @@ void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector)
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}
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EXPORT_SYMBOL_GPL(kvm_apic_set_eoi_accelerated);
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static void apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
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void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
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{
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struct kvm_lapic_irq irq;
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@ -1955,7 +1955,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
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case APIC_ICR:
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/* No delay here, so we always clear the pending bit */
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val &= ~(1 << 12);
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apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2));
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kvm_apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2));
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kvm_lapic_set_reg(apic, APIC_ICR, val);
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break;
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@ -96,6 +96,7 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu);
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bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
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void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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@ -1585,8 +1585,12 @@ static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data
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((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
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((data & APIC_MODE_MASK) == APIC_DM_FIXED)) {
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data &= ~(1 << 12);
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kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
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kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
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return kvm_lapic_reg_write(vcpu->arch.apic, APIC_ICR, (u32)data);
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kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
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trace_kvm_apic_write(APIC_ICR, (u32)data);
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return 0;
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}
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return 1;
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