forked from luck/tmp_suning_uos_patched
bcma: handle more devices in bcma_pmu_get_alp_clock()
Add some more chip IDs to bcma_pmu_get_alp_clock() Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -174,19 +174,35 @@ u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case BCMA_CHIP_ID_BCM4716:
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case BCMA_CHIP_ID_BCM4748:
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case BCMA_CHIP_ID_BCM47162:
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case BCMA_CHIP_ID_BCM4313:
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM43224:
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case BCMA_CHIP_ID_BCM43225:
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case BCMA_CHIP_ID_BCM43227:
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case BCMA_CHIP_ID_BCM43228:
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case BCMA_CHIP_ID_BCM4331:
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case BCMA_CHIP_ID_BCM43421:
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case BCMA_CHIP_ID_BCM43428:
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case BCMA_CHIP_ID_BCM43431:
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case BCMA_CHIP_ID_BCM4716:
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case BCMA_CHIP_ID_BCM47162:
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case BCMA_CHIP_ID_BCM4748:
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case BCMA_CHIP_ID_BCM4749:
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM53572:
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case BCMA_CHIP_ID_BCM6362:
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/* always 20Mhz */
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return 20000 * 1000;
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case BCMA_CHIP_ID_BCM5356:
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case BCMA_CHIP_ID_BCM4706:
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case BCMA_CHIP_ID_BCM5356:
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/* always 25Mhz */
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return 25000 * 1000;
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case BCMA_CHIP_ID_BCM43460:
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case BCMA_CHIP_ID_BCM4352:
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case BCMA_CHIP_ID_BCM4360:
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if (cc->status & BCMA_CC_CHIPST_4360_XTAL_40MZ)
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return 40000 * 1000;
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else
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return 20000 * 1000;
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default:
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bcma_warn(bus, "No ALP clock specified for %04X device, pmu rev. %d, using default %d Hz\n",
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bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
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@ -104,6 +104,7 @@
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#define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */
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#define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */
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#define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */
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#define BCMA_CC_CHIPST_4360_XTAL_40MZ 0x00000001
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#define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */
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#define BCMA_CC_JCMD_START 0x80000000
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#define BCMA_CC_JCMD_BUSY 0x80000000
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