forked from luck/tmp_suning_uos_patched
x86/mm, asm-generic: Add ioremap_wt() for creating Write-Through mappings
Add ioremap_wt() for creating Write-Through mappings on x86. It follows the same model as ioremap_wc() for multi-arch support. Define ARCH_HAS_IOREMAP_WT in the x86 version of io.h to indicate that ioremap_wt() is implemented on x86. Also update the PAT documentation file to cover ioremap_wt(). Signed-off-by: Toshi Kani <toshi.kani@hp.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Elliott@hp.com Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: arnd@arndb.de Cc: hch@lst.de Cc: hmh@hmh.eng.br Cc: jgross@suse.com Cc: konrad.wilk@oracle.com Cc: linux-mm <linux-mm@kvack.org> Cc: linux-nvdimm@lists.01.org Cc: stefan.bader@canonical.com Cc: yigal@plexistor.com Link: http://lkml.kernel.org/r/1433436928-31903-8-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -12,7 +12,7 @@ virtual addresses.
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PAT allows for different types of memory attributes. The most commonly used
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ones that will be supported at this time are Write-back, Uncached,
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Write-combined and Uncached Minus.
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Write-combined, Write-through and Uncached Minus.
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PAT APIs
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@ -40,6 +40,8 @@ ioremap_nocache | -- | UC- | UC- |
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ioremap_wc | -- | -- | WC |
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ioremap_wt | -- | -- | WT |
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set_memory_uc | UC- | -- | -- |
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set_memory_wb | | | |
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@ -35,6 +35,7 @@
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*/
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#define ARCH_HAS_IOREMAP_WC
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#define ARCH_HAS_IOREMAP_WT
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#include <linux/string.h>
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#include <linux/compiler.h>
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@ -320,6 +321,7 @@ extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
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extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
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enum page_cache_mode pcm);
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extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
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extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
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extern bool is_early_ioremap_ptep(pte_t *ptep);
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@ -172,6 +172,10 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_WC));
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break;
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case _PAGE_CACHE_MODE_WT:
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_WT));
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break;
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case _PAGE_CACHE_MODE_WB:
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break;
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}
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@ -297,6 +301,23 @@ void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
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}
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EXPORT_SYMBOL(ioremap_wc);
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/**
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* ioremap_wt - map memory into CPU space write through
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* @phys_addr: bus address of the memory
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* @size: size of the resource to map
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*
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* This version of ioremap ensures that the memory is marked write through.
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* Write through stores data into memory while keeping the cache up-to-date.
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*
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* Must be freed with iounmap.
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*/
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void __iomem *ioremap_wt(resource_size_t phys_addr, unsigned long size)
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{
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return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WT,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_wt);
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void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)
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{
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return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB,
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@ -785,8 +785,17 @@ static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)
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}
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#endif
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#ifndef ioremap_wt
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#define ioremap_wt ioremap_wt
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static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size)
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{
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return ioremap_nocache(offset, size);
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}
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#endif
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#ifndef iounmap
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#define iounmap iounmap
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static inline void iounmap(void __iomem *addr)
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{
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}
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@ -66,6 +66,10 @@ extern void ioport_unmap(void __iomem *);
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#define ioremap_wc ioremap_nocache
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#endif
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#ifndef ARCH_HAS_IOREMAP_WT
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#define ioremap_wt ioremap_nocache
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#endif
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#ifdef CONFIG_PCI
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/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
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struct pci_dev;
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