forked from luck/tmp_suning_uos_patched
[PATCH] x86_64: Fix some comments in tlbflush.h
Were either outdated or misleading. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
ef4d7cbea7
commit
d970a52180
@ -56,8 +56,9 @@ extern unsigned long pgkern_mask;
|
||||
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
|
||||
* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
|
||||
*
|
||||
* ..but the x86_64 has somewhat limited tlb flushing capabilities,
|
||||
* and page-granular flushes are available only on i486 and up.
|
||||
* x86-64 can only flush individual pages or full VMs. For a range flush
|
||||
* we always do the full VM. Might be worth trying if for a small
|
||||
* range a few INVLPGs in a row are a win.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
@ -115,7 +116,9 @@ static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long st
|
||||
static inline void flush_tlb_pgtables(struct mm_struct *mm,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
/* x86_64 does not keep any page table caches in TLB */
|
||||
/* x86_64 does not keep any page table caches in a software TLB.
|
||||
The CPUs do in their hardware TLBs, but they are handled
|
||||
by the normal TLB flushing algorithms. */
|
||||
}
|
||||
|
||||
#endif /* _X8664_TLBFLUSH_H */
|
||||
|
Loading…
Reference in New Issue
Block a user