From d9b79fb56829de34eaddb01b405216eddd0d3b10 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:51 +0100 Subject: [PATCH] [ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts Add and initialise the two VIC (PL192) found on the S3C64XX series CPUs. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c6410/cpu.c | 6 ++++ arch/arm/plat-s3c/include/plat/cpu.h | 1 + arch/arm/plat-s3c64xx/Kconfig | 1 + arch/arm/plat-s3c64xx/Makefile | 1 + arch/arm/plat-s3c64xx/include/plat/irqs.h | 3 ++ arch/arm/plat-s3c64xx/include/plat/s3c6410.h | 1 + arch/arm/plat-s3c64xx/irq.c | 34 ++++++++++++++++++++ 7 files changed, 47 insertions(+) create mode 100644 arch/arm/plat-s3c64xx/irq.c diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c index fbca763fa486..c3e317c16502 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c6410/cpu.c @@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal) s3c24xx_register_baseclocks(xtal); } +void __init s3c6410_init_irq(void) +{ + /* VIC0 is missing IRQ7, VIC1 is fully populated. */ + s3c64xx_init_irq(~0 & ~(1 << 7), ~0); +} + struct sysdev_class s3c6410_sysclass = { .name = "s3c6410-core", }; diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index 011157ea871a..6d89a4637f30 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h @@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode, /* core initialisation functions */ extern void s3c24xx_init_irq(void); +extern void s3c64xx_init_irq(u32 vic0, u32 vic1); extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index 756c166051bf..14d6343b54e8 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -10,6 +10,7 @@ config PLAT_S3C64XX bool depends on ARCH_S3C64XX select PLAT_S3C + select ARM_VIC default y select NO_IOPORT select ARCH_REQUIRE_GPIOLIB diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 5d9a1d86ab8e..9be8ed59977f 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -14,3 +14,4 @@ obj- := obj-y += dev-uart.o obj-y += cpu.o +obj-y += irq.o diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h index 0092b5cba4a2..3564dfbec85a 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h @@ -24,6 +24,9 @@ #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) +#define S3C_VIC0_BASE S3C_IRQ(0) +#define S3C_VIC1_BASE S3C_IRQ(32) + /* UART interrupts, each UART has 4 intterupts per channel so * use the space between the ISA and S3C main interrupts. Note, these * are not in the same order as the S3C24XX series! */ diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h index 56f14b5d454b..50dcdd6f6800 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h +++ b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h @@ -15,6 +15,7 @@ #ifdef CONFIG_CPU_S3C6410 extern int s3c6410_init(void); +extern void s3c6410_init_irq(void); extern void s3c6410_map_io(void); extern void s3c6410_init_clocks(int xtal); diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c new file mode 100644 index 000000000000..308dc4198a17 --- /dev/null +++ b/arch/arm/plat-s3c64xx/irq.c @@ -0,0 +1,34 @@ +/* arch/arm/plat-s3c64xx/irq.c + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - Interrupt handling + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#include +#include + +void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) +{ + printk(KERN_INFO "%s: initialising interrupts\n", __func__); + + /* initialise the pair of VICs */ + vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid); + vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid); +} + +