forked from luck/tmp_suning_uos_patched
clk: mediatek: add mt2701 ethernet reset
The ethernet clock core has a reset register that is currently not exposed to the user. Fix this by adding the missing registration code. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -66,6 +66,8 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev)
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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mtk_register_reset_controller(node, 1, 0x34);
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return r;
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}
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