forked from luck/tmp_suning_uos_patched
x86/amd-iommu: Use __iommu_flush_pages for tlb flushes
This patch re-implements iommu_flush_tlb functions to use the __iommu_flush_pages logic. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -451,7 +451,7 @@ static void __iommu_flush_pages(struct protection_domain *domain,
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u64 address, size_t size, int pde)
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{
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int s = 0, i;
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unsigned pages = iommu_num_pages(address, size, PAGE_SIZE);
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unsigned long pages = iommu_num_pages(address, size, PAGE_SIZE);
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address &= PAGE_MASK;
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@ -487,23 +487,15 @@ static void iommu_flush_pages(struct protection_domain *domain,
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}
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/* Flush the whole IO/TLB for a given protection domain */
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static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid)
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static void iommu_flush_tlb(struct protection_domain *domain)
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{
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u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
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INC_STATS_COUNTER(domain_flush_single);
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iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1);
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__iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
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}
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/* Flush the whole IO/TLB for a given protection domain - including PDE */
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static void iommu_flush_tlb_pde(struct amd_iommu *iommu, u16 domid)
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static void iommu_flush_tlb_pde(struct protection_domain *domain)
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{
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u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
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INC_STATS_COUNTER(domain_flush_single);
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iommu_queue_inv_iommu_pages(iommu, address, domid, 1, 1);
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__iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
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}
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/*
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@ -1236,7 +1228,7 @@ static void attach_device(struct amd_iommu *iommu,
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* here to evict all dirty stuff.
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*/
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iommu_queue_inv_dev_entry(iommu, devid);
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iommu_flush_tlb_pde(iommu, domain->id);
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iommu_flush_tlb_pde(domain);
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}
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/*
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@ -1697,7 +1689,7 @@ static dma_addr_t __map_single(struct device *dev,
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ADD_STATS_COUNTER(alloced_io_mem, size);
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if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) {
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iommu_flush_tlb(iommu, dma_dom->domain.id);
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iommu_flush_tlb(&dma_dom->domain);
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dma_dom->need_flush = false;
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} else if (unlikely(iommu_has_npcache(iommu)))
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iommu_flush_pages(&dma_dom->domain, address, size);
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