forked from luck/tmp_suning_uos_patched
cpm2: Rework baud rate generators configuration to support external clocks.
The CPM2 BRG setup functions cpm_setbrg and cpm2_fastbrg don't support external clocks. This patch adds a new exported __cpm2_setbrg function that takes the clock rate and clock source as extra parameters, and moves cpm_setbrg and cpm2_fastbrg to include/asm-powerpc/cpm2.h where they become inline wrappers around __cpm2_setbrg. Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -115,16 +115,10 @@ EXPORT_SYMBOL(cpm_command);
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* Baud rate clocks are zero-based in the driver code (as that maps
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* to port numbers). Documentation uses 1-based numbering.
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*/
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#define BRG_INT_CLK (get_brgfreq())
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#define BRG_UART_CLK (BRG_INT_CLK/16)
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/* This function is used by UARTS, or anything else that uses a 16x
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* oversampled clock.
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*/
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void
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cpm_setbrg(uint brg, uint rate)
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void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)
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{
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u32 __iomem *bp;
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u32 val;
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/* This is good enough to get SMCs running.....
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*/
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@ -135,34 +129,14 @@ cpm_setbrg(uint brg, uint rate)
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brg -= 4;
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}
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bp += brg;
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out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
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cpm2_unmap(bp);
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}
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/* This function is used to set high speed synchronous baud rate
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* clocks.
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*/
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void
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cpm2_fastbrg(uint brg, uint rate, int div16)
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{
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u32 __iomem *bp;
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u32 val;
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if (brg < 4) {
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bp = cpm2_map_size(im_brgc1, 16);
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} else {
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bp = cpm2_map_size(im_brgc5, 16);
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brg -= 4;
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}
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bp += brg;
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val = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
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val = (((clk / rate) - 1) << 1) | CPM_BRG_EN | src;
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if (div16)
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val |= CPM_BRG_DIV16;
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out_be32(bp, val);
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cpm2_unmap(bp);
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}
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EXPORT_SYMBOL(__cpm2_setbrg);
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int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
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{
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@ -12,6 +12,7 @@
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#include <asm/immap_cpm2.h>
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#include <asm/cpm.h>
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#include <sysdev/fsl_soc.h>
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#ifdef CONFIG_PPC_85xx
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#define CPM_MAP_ADDR (get_immrbase() + 0x80000)
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@ -93,10 +94,40 @@ extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
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#define cpm_dpfree cpm_muram_free
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#define cpm_dpram_addr cpm_muram_addr
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extern void cpm_setbrg(uint brg, uint rate);
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extern void cpm2_fastbrg(uint brg, uint rate, int div16);
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extern void cpm2_reset(void);
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/* Baud rate generators.
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*/
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#define CPM_BRG_RST ((uint)0x00020000)
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#define CPM_BRG_EN ((uint)0x00010000)
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#define CPM_BRG_EXTC_INT ((uint)0x00000000)
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#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000)
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#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000)
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#define CPM_BRG_ATB ((uint)0x00002000)
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#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
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#define CPM_BRG_DIV16 ((uint)0x00000001)
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#define CPM2_BRG_INT_CLK (get_brgfreq())
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#define CPM2_BRG_UART_CLK (CPM2_BRG_INT_CLK/16)
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extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
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/* This function is used by UARTS, or anything else that uses a 16x
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* oversampled clock.
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*/
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static inline void cpm_setbrg(uint brg, uint rate)
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{
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__cpm2_setbrg(brg, rate, CPM2_BRG_UART_CLK, 0, CPM_BRG_EXTC_INT);
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}
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/* This function is used to set high speed synchronous baud rate
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* clocks.
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*/
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static inline void cpm2_fastbrg(uint brg, uint rate, int div16)
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{
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__cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
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}
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/* Function code bits, usually generic to devices.
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*/
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#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
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@ -195,17 +226,6 @@ typedef struct smc_uart {
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#define SMCM_TX ((unsigned char)0x02)
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#define SMCM_RX ((unsigned char)0x01)
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/* Baud rate generators.
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*/
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#define CPM_BRG_RST ((uint)0x00020000)
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#define CPM_BRG_EN ((uint)0x00010000)
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#define CPM_BRG_EXTC_INT ((uint)0x00000000)
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#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000)
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#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000)
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#define CPM_BRG_ATB ((uint)0x00002000)
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#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
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#define CPM_BRG_DIV16 ((uint)0x00000001)
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/* SCCs.
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*/
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#define SCC_GSMRH_IRP ((uint)0x00040000)
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