forked from luck/tmp_suning_uos_patched
Merge tag 'ti-sysc-fixes' into fixes
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commit
df85429959
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@ -7,7 +7,6 @@ config ARCH_OMAP2
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depends on ARCH_MULTI_V6
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select ARCH_OMAP2PLUS
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select CPU_V6
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select PM_GENERIC_DOMAINS if PM
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select SOC_HAS_OMAP2_SDRC
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config ARCH_OMAP3
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@ -106,6 +105,8 @@ config ARCH_OMAP2PLUS
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select OMAP_DM_TIMER
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select OMAP_GPMC
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select PINCTRL
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select PM_GENERIC_DOMAINS if PM
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select PM_GENERIC_DOMAINS_OF if PM
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select RESET_CONTROLLER
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select SOC_BUS
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select TI_SYSC
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@ -227,6 +227,9 @@ static int sysc_wait_softreset(struct sysc *ddata)
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u32 sysc_mask, syss_done, rstval;
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int syss_offset, error = 0;
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if (ddata->cap->regbits->srst_shift < 0)
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return 0;
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syss_offset = ddata->offsets[SYSC_SYSSTATUS];
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sysc_mask = BIT(ddata->cap->regbits->srst_shift);
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@ -970,9 +973,15 @@ static int sysc_enable_module(struct device *dev)
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return error;
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}
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}
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error = sysc_wait_softreset(ddata);
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if (error)
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dev_warn(ddata->dev, "OCP softreset timed out\n");
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/*
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* Some modules like i2c and hdq1w have unusable reset status unless
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* the module reset quirk is enabled. Skip status check on enable.
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*/
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if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
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error = sysc_wait_softreset(ddata);
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if (error)
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dev_warn(ddata->dev, "OCP softreset timed out\n");
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}
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if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
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sysc_disable_opt_clocks(ddata);
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@ -1373,17 +1382,17 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff,
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SYSC_QUIRK_OPT_CLKS_NEEDED),
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SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff,
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SYSC_MODULE_QUIRK_HDQ1W),
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SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff,
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SYSC_MODULE_QUIRK_HDQ1W),
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SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000036, 0x000000ff,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x0000003c, 0x000000ff,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000040, 0x000000ff,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
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SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff,
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SYSC_MODULE_QUIRK_SGX),
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@ -50,6 +50,7 @@ struct sysc_regbits {
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s8 emufree_shift;
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};
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#define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25)
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#define SYSC_MODULE_QUIRK_PRUSS BIT(24)
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#define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)
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#define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22)
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