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powerpc: split She math emulation into two parts

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For some SoC (such as the FSL BookE) even though there does have
a hardware FPU, but not all floating point instructions are
implemented. Unfortunately some versions of gcc do use these
unimplemented instructions. Then we have to enable the math emulation
to workaround this issue. It seems a little redundant to have the
support to emulate all the floating point instructions in this case.
So split the math emulation into two parts. One is for the SoC which
doesn't have FPU at all and the other for the SoC which does have the
hardware FPU and only need some special floating point instructions to
be emulated.

Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Kevin Hao 2013-07-16 19:57:15 +08:00 committed by Benjamin Herrenschmidt
parent 3a3b5aa63f
commit e05c0e81b0
3 changed files with 46 additions and 18 deletions
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20
arch/powerpc/Kconfig
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@ -312,6 +312,26 @@ config MATH_EMULATION
such as fsqrt on cores that do have an FPU but do not implement
them (such as Freescale BookE).
choice
prompt "Math emulation options"
default MATH_EMULATION_FULL
depends on MATH_EMULATION
config MATH_EMULATION_FULL
bool "Emulate all the floating point instructions"
---help---
Select this option will enable the kernel to support to emulate
all the floating point instructions. If your SoC doesn't have
a FPU, you should select this.
config MATH_EMULATION_HW_UNIMPLEMENTED
bool "Just emulate the FPU unimplemented instructions"
---help---
Select this if you know there does have a hardware FPU on your
SoC, but some floating point instructions are not implemented by that.
endchoice
config PPC_TRANSACTIONAL_MEM
bool "Transactional Memory support for POWERPC"
depends on PPC_BOOK3S_64

24
arch/powerpc/math-emu/Makefile
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@ -1,15 +1,15 @@
obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
fctiw.o fctiwz.o fdiv.o fdivs.o \
fmadd.o fmadds.o fmsub.o fmsubs.o \
fmul.o fmuls.o fnabs.o fneg.o \
fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
fres.o fre.o frsp.o fsel.o lfs.o \
frsqrte.o frsqrtes.o \
fsqrt.o fsqrts.o fsub.o fsubs.o \
mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
mtfsf.o mtfsfi.o stfiwx.o stfs.o \
math.o fmr.o lfd.o stfd.o
math-emu-common-objs = math.o fre.o fsqrt.o fsqrts.o frsqrtes.o mtfsf.o mtfsfi.o
obj-$(CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED) += $(math-emu-common-objs)
obj-$(CONFIG_MATH_EMULATION_FULL) += $(math-emu-common-objs) fabs.o fadd.o \
fadds.o fcmpo.o fcmpu.o fctiw.o \
fctiwz.o fdiv.o fdivs.o fmadd.o \
fmadds.o fmsub.o fmsubs.o fmul.o \
fmuls.o fnabs.o fneg.o fnmadd.o \
fnmadds.o fnmsub.o fnmsubs.o fres.o \
frsp.o fsel.o lfs.o frsqrte.o fsub.o \
fsubs.o mcrfs.o mffs.o mtfsb0.o \
mtfsb1.o stfiwx.o stfs.o math.o \
fmr.o lfd.o stfd.o
obj-$(CONFIG_SPE) += math_efp.o

20
arch/powerpc/math-emu/math.c
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@ -13,6 +13,20 @@
#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
/* The instructions list which may be not implemented by a hardware FPU */
FLOATFUNC(fre);
FLOATFUNC(frsqrtes);
FLOATFUNC(fsqrt);
FLOATFUNC(fsqrts);
FLOATFUNC(mtfsf);
FLOATFUNC(mtfsfi);
#ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED
#undef FLOATFUNC(x)
#define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
void *op4) { }
#endif
FLOATFUNC(fadd);
FLOATFUNC(fadds);
FLOATFUNC(fdiv);
@ -42,8 +56,6 @@ FLOATFUNC(mcrfs);
FLOATFUNC(mffs);
FLOATFUNC(mtfsb0);
FLOATFUNC(mtfsb1);
FLOATFUNC(mtfsf);
FLOATFUNC(mtfsfi);
FLOATFUNC(lfd);
FLOATFUNC(lfs);
@ -58,13 +70,9 @@ FLOATFUNC(fnabs);
FLOATFUNC(fneg);
/* Optional */
FLOATFUNC(fre);
FLOATFUNC(fres);
FLOATFUNC(frsqrte);
FLOATFUNC(frsqrtes);
FLOATFUNC(fsel);
FLOATFUNC(fsqrt);
FLOATFUNC(fsqrts);
#define OP31 0x1f /* 31 */