forked from luck/tmp_suning_uos_patched
MIPS: Initialise MAARs on secondary CPUs
MAARs should be initialised on each CPU (or rather, core) in the system in order to achieve consistent behaviour & performance. Previously they have only been initialised on the boot CPU which leads to performance problems if tasks are later scheduled on a secondary CPU, particularly if those tasks make use of unaligned vector accesses where some CPUs don't handle any cases in hardware for non-speculative memory regions. Fix this by recording the MAAR configuration from the boot CPU and applying it to secondary CPUs as part of their bringup. Reported-by: Doug Gilmore <doug.gilmore@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: linux-kernel@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: James Hogan <james.hogan@imgtec.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Hemmo Nieminen <hemmo.nieminen@iki.fi> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/11239/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -65,6 +65,15 @@ static inline void write_maar_pair(unsigned idx, phys_addr_t lower,
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back_to_back_c0_hazard();
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}
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/**
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* maar_init() - initialise MAARs
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*
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* Performs initialisation of MAARs for the current CPU, making use of the
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* platforms implementation of platform_maar_init where necessary and
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* duplicating the setup it provides on secondary CPUs.
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*/
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extern void maar_init(void);
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/**
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* struct maar_config - MAAR configuration data
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* @lower: The lowest address that the MAAR pair will affect. Must be
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@ -42,6 +42,7 @@
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#include <asm/mmu_context.h>
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#include <asm/time.h>
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#include <asm/setup.h>
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#include <asm/maar.h>
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cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
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@ -157,6 +158,7 @@ asmlinkage void start_secondary(void)
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mips_clockevent_init();
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mp_ops->init_secondary();
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cpu_report();
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maar_init();
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/*
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* XXX parity protection should be folded in here when it's converted
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@ -44,6 +44,7 @@
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#include <asm/pgalloc.h>
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#include <asm/tlb.h>
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#include <asm/fixmap.h>
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#include <asm/maar.h>
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/*
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* We have up to 8 empty zeroed pages so we can map one of the right colour
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@ -288,10 +289,14 @@ unsigned __weak platform_maar_init(unsigned num_pairs)
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return num_configured;
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}
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static void maar_init(void)
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void maar_init(void)
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{
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unsigned num_maars, used, i;
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phys_addr_t lower, upper, attr;
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static struct {
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struct maar_config cfgs[3];
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unsigned used;
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} recorded = { { { 0 } }, 0 };
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if (!cpu_has_maar)
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return;
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@ -304,8 +309,14 @@ static void maar_init(void)
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/* MAARs should be in pairs */
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WARN_ON(num_maars % 2);
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/* Set MAARs using values we recorded already */
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if (recorded.used) {
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used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
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BUG_ON(used != recorded.used);
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} else {
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/* Configure the required MAARs */
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used = platform_maar_init(num_maars / 2);
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}
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/* Disable any further MAARs */
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for (i = (used * 2); i < num_maars; i++) {
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@ -315,6 +326,9 @@ static void maar_init(void)
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back_to_back_c0_hazard();
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}
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if (recorded.used)
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return;
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pr_info("MAAR configuration:\n");
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for (i = 0; i < num_maars; i += 2) {
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write_c0_maari(i);
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@ -341,6 +355,14 @@ static void maar_init(void)
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pr_cont(" speculate");
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pr_cont("\n");
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/* Record the setup for use on secondary CPUs */
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if (used <= ARRAY_SIZE(recorded.cfgs)) {
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recorded.cfgs[recorded.used].lower = lower;
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recorded.cfgs[recorded.used].upper = upper;
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recorded.cfgs[recorded.used].attrs = attr;
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recorded.used++;
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}
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}
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}
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