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ARM: Devicetree updates

Browse Source 
As usual, most of the changes are to devicetrees. Besides smaller fixes,
 some refactorings and cleanups, some of the new platforms and chips
 (or significant features) supported are below:
 
 Broadcom boards:
  - Cisco Meraki MR32 (BCM53016-based)
  - BCM2711 (RPi4) display pipeline support
 
 Actions Semi boards:
  - Caninos Loucos Labrador SBC (S500-based)
  - RoseapplePi SBC (S500-based)
 
 Allwinner SoCs/boards:
  - A100 SoC with Perf1 board
  - Mali, DMA, Cetrus and IR support for R40 SoC
 
 Amlogic boards:
  - Libretch S905x CC V2 board
  - Hardkernel ODROID-N2+ board
 
 Aspeed boards/platforms:
  - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
  - Facebook Wedge400 (AST2500-based, ToR switch)
 
 Hisilicon SoC:
  - SD5203 SoC
 
 Nvidia boards:
  - Tegra234 VDK, for pre-silicon Orin SoC
 
 NXP i.MX boards:
  - Librem 5 phone
  - i.MX8MM DDR4 EVK
  - Variscite VAR-SOM-MX8MN SoM
  - Symphony board
  - Tolino Shine 2 HD
  - TQMa6 SoM
  - Y Soft IOTA Orion
 
 Rockchip boards:
  - NanoPi R2S board
  - A95X-Z2 board
  - more Rock-Pi4 variants
 
 STM32 boards:
  - Odyssey SOM board (STM32MP157CAC-based)
  - DH DRC02 board
 
 Toshiba SoCs/boards:
  - Visconti SoC and TPMV7708 board
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...
This commit is contained in:
Linus Torvalds 2020-10-24 10:44:18 -07:00
commit e533cda12d
660 changed files with 28229 additions and 6835 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/devicetree/bindings/arm/actions.yaml
View File

@ -20,6 +20,12 @@ properties:
- enum:
- allo,sparky # Allo.com Sparky
- cubietech,cubieboard6 # Cubietech CubieBoard6
- roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi
- const: actions,s500
- items:
- enum:
- caninos,labrador-base-m # Labrador Base Board M v1
- const: caninos,labrador-v2 # Labrador Core v2
- const: actions,s500
- items:
- enum:
@ -28,6 +34,11 @@ properties:
- const: actions,s500
# The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC.
- items:
- enum:
- caninos,labrador-base-m2 # Labrador Base Board M v2
- const: caninos,labrador-v3 # Labrador Core v3
- const: actions,s700
- items:
- enum:
- cubietech,cubieboard7 # Cubietech CubieBoard7

2
Documentation/devicetree/bindings/arm/amlogic.yaml
View File

@ -96,6 +96,7 @@ properties:
- hwacom,amazetv
- khadas,vim
- libretech,aml-s905x-cc
- libretech,aml-s905x-cc-v2
- nexbox,a95x
- const: amlogic,s905x
- const: amlogic,meson-gxl
@ -153,6 +154,7 @@ properties:
- azw,gtking
- azw,gtking-pro
- hardkernel,odroid-n2
- hardkernel,odroid-n2-plus
- khadas,vim3
- ugoos,am6
- const: amlogic,s922x

1
Documentation/devicetree/bindings/arm/atmel-at91.yaml
View File

@ -41,6 +41,7 @@ properties:
- overkiz,kizboxmini-mb # Overkiz kizbox Mini Mother Board
- overkiz,kizboxmini-rd # Overkiz kizbox Mini RailDIN
- overkiz,smartkiz # Overkiz SmartKiz Board
- gardena,smart-gateway-at91sam # GARDENA smart Gateway (Article No. 19000)
- const: atmel,at91sam9g25
- const: atmel,at91sam9x5
- const: atmel,at91sam9

2
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml
View File

@ -83,6 +83,8 @@ properties:
- brcm,bcm953012er
- brcm,bcm953012hr
- brcm,bcm953012k
- meraki,mr32
- const: brcm,brcm53012
- const: brcm,brcm53016
- const: brcm,bcm4708
...

95
Documentation/devicetree/bindings/arm/fsl.yaml
View File

@ -120,6 +120,7 @@ properties:
- fsl,imx6q-sabrelite
- fsl,imx6q-sabresd
- kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module
- logicpd,imx6q-logicpd
- prt,prti6q # Protonic PRTI6Q board
- prt,prtwd2 # Protonic WD2 board
- technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf
@ -156,6 +157,21 @@ properties:
- const: gw,ventana
- const: fsl,imx6q
- description: i.MX6Q PHYTEC phyBOARD-Mira
items:
- enum:
- phytec,imx6q-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK
- phytec,imx6q-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK
- const: phytec,imx6q-pbac06 # PHYTEC phyBOARD-Mira
- const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6
- const: fsl,imx6q
- description: i.MX6Q PHYTEC phyFLEX-i.MX6
items:
- const: phytec,imx6q-pbab01 # PHYTEC phyFLEX carrier board
- const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad
- const: fsl,imx6q
- description: i.MX6QP based Boards
items:
- enum:
@ -163,6 +179,13 @@ properties:
- fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board
- const: fsl,imx6qp
- description: i.MX6QP PHYTEC phyBOARD-Mira
items:
- const: phytec,imx6qp-pbac06-nand
- const: phytec,imx6qp-pbac06 # PHYTEC phyBOARD-Mira
- const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6
- const: fsl,imx6qp
- description: i.MX6DL based Boards
items:
- enum:
@ -188,6 +211,7 @@ properties:
- toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6 Module V1.1 on Colibri Evaluation Board V3
- ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board
- ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board
- ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board
- ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board
- const: fsl,imx6dl
@ -211,10 +235,26 @@ properties:
- const: gw,ventana
- const: fsl,imx6dl
- description: i.MX6DL PHYTEC phyBOARD-Mira
items:
- enum:
- phytec,imx6dl-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK
- phytec,imx6dl-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK
- const: phytec,imx6dl-pbac06 # PHYTEC phyBOARD-Mira
- const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6
- const: fsl,imx6dl
- description: i.MX6DL PHYTEC phyFLEX-i.MX6
items:
- const: phytec,imx6dl-pbab01 # PHYTEC phyFLEX carrier board
- const: phytec,imx6dl-pfla02 # PHYTEC phyFLEX-i.MX6 Quad
- const: fsl,imx6dl
- description: i.MX6SL based Boards
items:
- enum:
- fsl,imx6sl-evk # i.MX6 SoloLite EVK Board
- kobo,tolino-shine2hd
- kobo,tolino-shine3
- const: fsl,imx6sl
@ -246,6 +286,15 @@ properties:
- technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi
- const: fsl,imx6ul
- description: i.MX6UL PHYTEC phyBOARD-Segin
items:
- enum:
- phytec,imx6ul-pbacd10-emmc
- phytec,imx6ul-pbacd10-nand
- const: phytec,imx6ul-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 UL
- const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL
- const: fsl,imx6ul
- description: Kontron N6310 S Board
items:
- const: kontron,imx6ul-n6310-s
@ -277,6 +326,15 @@ properties:
- toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT Module on Colibri Eval Board
- const: fsl,imx6ull
- description: i.MX6ULL PHYTEC phyBOARD-Segin
items:
- enum:
- phytec,imx6ull-pbacd10-emmc
- phytec,imx6ull-pbacd10-nand
- const: phytec,imx6ull-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 ULL
- const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL
- const: fsl,imx6ull
- description: Kontron N6411 S Board
items:
- const: kontron,imx6ull-n6411-s
@ -344,7 +402,16 @@ properties:
- description: i.MX8MM based Boards
items:
- enum:
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
- variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
- const: fsl,imx8mm
- description: Variscite VAR-SOM-MX8MM based boards
items:
- const: variscite,var-som-mx8mm-symphony
- const: variscite,var-som-mx8mm
- const: fsl,imx8mm
- description: i.MX8MN based Boards
@ -354,6 +421,12 @@ properties:
- fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board
- const: fsl,imx8mn
- description: Variscite VAR-SOM-MX8MN based boards
items:
- const: variscite,var-som-mx8mn-symphony
- const: variscite,var-som-mx8mn
- const: fsl,imx8mn
- description: i.MX8MP based Boards
items:
- enum:
@ -372,13 +445,35 @@ properties:
- technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk
- const: fsl,imx8mq
- description: Purism Librem5 phones
items:
- enum:
- purism,librem5r2 # Purism Librem5 phone "Chestnut"
- purism,librem5r3 # Purism Librem5 phone "Dogwood"
- const: purism,librem5
- const: fsl,imx8mq
- description: Zodiac Inflight Innovations Ultra Boards
items:
- enum:
- zii,imx8mq-ultra-rmb3
- zii,imx8mq-ultra-zest
- const: zii,imx8mq-ultra
- const: fsl,imx8mq
- description: i.MX8QXP based Boards
items:
- enum:
- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
- toradex,colibri-imx8x # Colibri iMX8X Module
- const: fsl,imx8qxp
- description: Toradex Colibri i.MX8 Evaluation Board
items:
- enum:
- toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3
- const: toradex,colibri-imx8x
- const: fsl,imx8qxp
- description:

11
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -40,6 +40,7 @@ description: |
sdm630
sdm660
sdm845
sm8250
The 'board' element must be one of the following strings:
@ -47,6 +48,8 @@ description: |
cp01-c1
dragonboard
hk01
hk10-c1
hk10-c2
idp
liquid
mtp
@ -150,6 +153,8 @@ properties:
- items:
- enum:
- qcom,ipq8074-hk01
- qcom,ipq8074-hk10-c1
- qcom,ipq8074-hk10-c2
- const: qcom,ipq8074
- items:
@ -167,4 +172,10 @@ properties:
- qcom,ipq6018-cp01-c1
- const: qcom,ipq6018
- items:
- enum:
- qcom,qrb5165-rb5
- qcom,sm8250-mtp
- const: qcom,sm8250
...

12
Documentation/devicetree/bindings/arm/renesas.yaml
View File

@ -281,6 +281,18 @@ properties:
- renesas,draak # Draak (RTP0RC77995SEB0010S)
- const: renesas,r8a77995
- description: R-Car V3U (R8A779A0)
items:
- enum:
- renesas,falcon-cpu # Falcon CPU board (RTP0RC779A0CPB0010S)
- const: renesas,r8a779a0
- items:
- enum:
- renesas,falcon-breakout # Falcon BreakOut board (RTP0RC779A0BOB0010S)
- const: renesas,falcon-cpu
- const: renesas,r8a779a0
- description: RZ/N1D (R9A06G032)
items:
- enum:

16
Documentation/devicetree/bindings/arm/rockchip.yaml
View File

@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
- description: FriendlyElec NanoPi R2S
items:
- const: friendlyarm,nanopi-r2s
- const: rockchip,rk3328
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
@ -430,8 +435,12 @@ properties:
- const: radxa,rock
- const: rockchip,rk3188
- description: Radxa ROCK Pi 4
- description: Radxa ROCK Pi 4A/B/C
items:
- enum:
- radxa,rockpi4a
- radxa,rockpi4b
- radxa,rockpi4c
- const: radxa,rockpi4
- const: rockchip,rk3399
@ -555,4 +564,9 @@ properties:
items:
- const: tronsmart,orion-r68-meta
- const: rockchip,rk3368
- description: Zkmagic A95X Z2
items:
- const: zkmagic,a95x-z2
- const: rockchip,rk3318
...

22
Documentation/devicetree/bindings/arm/samsung/pmu.yaml
View File

@ -24,6 +24,7 @@ select:
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
- samsung,exynos7-pmu
- samsung-s5pv210-pmu
required:
- compatible
@ -40,6 +41,7 @@ properties:
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
- samsung,exynos7-pmu
- samsung-s5pv210-pmu
- const: syscon
reg:
@ -88,12 +90,28 @@ properties:
required:
- compatible
- reg
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- samsung,exynos3250-pmu
- samsung,exynos4210-pmu
- samsung,exynos4412-pmu
- samsung,exynos5250-pmu
- samsung,exynos5410-pmu
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
then:
required:
- '#clock-cells'
- clock-names
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/exynos5250.h>

6
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@ -52,4 +52,10 @@ properties:
- const: st,stm32mp157c-ev1
- const: st,stm32mp157c-ed1
- const: st,stm32mp157
- description: Odyssey STM32MP1 SoM based Boards
items:
- enum:
- seeed,stm32mp157c-odyssey
- const: seeed,stm32mp157c-odyssey-som
- const: st,stm32mp157
...

10
Documentation/devicetree/bindings/arm/sunxi.yaml
View File

@ -16,6 +16,11 @@ properties:
compatible:
oneOf:
- description: Allwinner A100 Perf1 Board
items:
- const: allwinner,a100-perf1
- const: allwinner,sun50i-a100
- description: Allwinner A23 Evaluation Board
items:
- const: allwinner,sun8i-a23-evb
@ -626,6 +631,11 @@ properties:
- const: pine64,pine64-plus
- const: allwinner,sun50i-a64
- description: Pine64 PineCube
items:
- const: pine64,pinecube
- const: allwinner,sun8i-s3
- description: Pine64 PineH64 model A
items:
- const: pine64,pine-h64

4
Documentation/devicetree/bindings/arm/tegra.yaml
View File

@ -121,3 +121,7 @@ properties:
items:
- const: nvidia,p3509-0000+p3668-0000
- const: nvidia,tegra194
- items:
- enum:
- nvidia,tegra234-vdk
- const: nvidia,tegra234

3
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
View File

@ -4,6 +4,7 @@ Required properties:
- compatible: Should contain one of the following:
- "nvidia,tegra186-pmc": for Tegra186
- "nvidia,tegra194-pmc": for Tegra194
- "nvidia,tegra234-pmc": for Tegra234
- reg: Must contain an (offset, length) pair of the register set for each
entry in reg-names.
- reg-names: Must include the following entries:
@ -11,7 +12,7 @@ Required properties:
- "wake"
- "aotag"
- "scratch"
- "misc" (Only for Tegra194)
- "misc" (Only for Tegra194 and later)
Optional properties:
- nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.

26
Documentation/devicetree/bindings/arm/ti/k3.txt
View File

@ -1,26 +0,0 @@
Texas Instruments K3 Multicore SoC architecture device tree bindings
--------------------------------------------------------------------
Platforms based on Texas Instruments K3 Multicore SoC architecture
shall follow the following scheme:
SoCs
----
Each device tree root node must specify which exact SoC in K3 Multicore SoC
architecture it uses, using one of the following compatible values:
- AM654
compatible = "ti,am654";
- J721E
compatible = "ti,j721e";
Boards
------
In addition, each device tree root node must specify which one or more
of the following board-specific compatible values:
- AM654 EVM
compatible = "ti,am654-evm", "ti,am654";

35
Documentation/devicetree/bindings/arm/ti/k3.yaml Normal file
View File

@ -0,0 +1,35 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/ti/k3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 Multicore SoC architecture device tree bindings
maintainers:
- Nishanth Menon <nm@ti.com>
description: |
Platforms based on Texas Instruments K3 Multicore SoC architecture
shall have the following properties.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: K3 AM654 SoC
items:
- enum:
- ti,am654-evm
- const: ti,am654
- description: K3 J721E SoC
items:
- const: ti,j721e
- description: K3 J7200 SoC
items:
- const: ti,j7200
...

22
Documentation/devicetree/bindings/arm/toshiba.yaml Normal file
View File

@ -0,0 +1,22 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/toshiba.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba Visconti Platform Device Tree Bindings
maintainers:
- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Visconti5 TMPV7708
items:
- enum:
- toshiba,tmpv7708-rm-mbrc # TMPV7708 RM main board
- const: toshiba,tmpv7708
...

6
Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
View File

@ -23,7 +23,9 @@ properties:
- items:
- const: allwinner,sun7i-a20-crypto
- const: allwinner,sun4i-a10-crypto
- const: allwinner,sun8i-a33-crypto
- items:
- const: allwinner,sun8i-v3s-crypto
- const: allwinner,sun8i-a33-crypto
reg:
@ -59,7 +61,9 @@ if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-crypto
enum:
- allwinner,sun6i-a31-crypto
- allwinner,sun8i-a33-crypto
then:
required:

9
Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml
View File

@ -19,9 +19,12 @@ properties:
description: The cell is the request line number.
compatible:
enum:
- allwinner,sun50i-a64-dma
- allwinner,sun50i-h6-dma
oneOf:
- const: allwinner,sun50i-a64-dma
- const: allwinner,sun50i-h6-dma
- items:
- const: allwinner,sun8i-r40-dma
- const: allwinner,sun50i-a64-dma
reg:
maxItems: 1

1
Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
View File

@ -7,6 +7,7 @@ Required properties:
For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
"nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
For Tegra234 must contain "nvidia,tegra234-efuse".
Details:
nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
due to a hardware bug. Tegra20 also lacks certain information which is

2
Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
View File

@ -25,6 +25,7 @@ properties:
- allwinner,sun4i-a10-mali
- allwinner,sun7i-a20-mali
- allwinner,sun8i-h3-mali
- allwinner,sun8i-r40-mali
- allwinner,sun50i-a64-mali
- rockchip,rk3036-mali
- rockchip,rk3066-mali
@ -131,6 +132,7 @@ allOf:
enum:
- allwinner,sun4i-a10-mali
- allwinner,sun7i-a20-mali
- allwinner,sun8i-r40-mali
- allwinner,sun50i-a64-mali
- allwinner,sun50i-h5-mali
- amlogic,meson8-mali

5
Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml
View File

@ -29,10 +29,13 @@ properties:
- items:
- const: allwinner,sun8i-a83t-r-intc
- const: allwinner,sun6i-a31-r-intc
- const: allwinner,sun9i-a80-sc-nmi
- const: allwinner,sun9i-a80-nmi
- items:
- const: allwinner,sun50i-a64-r-intc
- const: allwinner,sun6i-a31-r-intc
- items:
- const: allwinner,sun50i-a100-nmi
- const: allwinner,sun9i-a80-nmi
- items:
- const: allwinner,sun50i-h6-r-intc
- const: allwinner,sun6i-a31-r-intc

1
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
View File

@ -16,6 +16,7 @@ maintainers:
properties:
compatible:
enum:
- qcom,ipq6018-apcs-apps-global
- qcom,ipq8074-apcs-apps-global
- qcom,msm8916-apcs-kpss-global
- qcom,msm8994-apcs-kpss-global

3
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
View File

@ -18,9 +18,12 @@ properties:
oneOf:
- const: allwinner,sun4i-a10-ir
- const: allwinner,sun5i-a13-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-a83t-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-r40-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun50i-a64-ir

8
Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
View File

@ -1,11 +1,13 @@
NVIDIA Tegra186 MISC register block
NVIDIA Tegra186 (and later) MISC register block
The MISC register block found on Tegra186 SoCs contains registers that can be
used to identify a given chip and various strapping options.
The MISC register block found on Tegra186 and later SoCs contains registers
that can be used to identify a given chip and various strapping options.
Required properties:
- compatible: Must be:
- Tegra186: "nvidia,tegra186-misc"
- Tegra194: "nvidia,tegra194-misc"
- Tegra234: "nvidia,tegra234-misc"
- reg: Should contain 2 entries: The first entry gives the physical address
and length of the register region which contains revision and debug
features. The second entry specifies the physical address and length

13
Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
View File

@ -1,10 +1,13 @@
NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
NVIDIA Tegra APBMISC block
Required properties:
- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30,
must be "nvidia,tegra30-apbmisc". Otherwise, must contain
"nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
tegra124, tegra132.
- compatible: Must be:
- Tegra20: "nvidia,tegra20-apbmisc"
- Tegra30: "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc"
- Tegra114: "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc"
- Tegra124: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"
- Tegra132: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"
- Tegra210: "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"
- reg: Should contain 2 entries: the first entry gives the physical address
and length of the registers which contain revision and debug features.
The second entry gives the physical address and length of the

4
Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt
View File

@ -2,7 +2,7 @@ On-Chip OTP Memory for Freescale Vybrid
Required Properties:
compatible:
- "fsl,vf610-ocotp" for VF5xx/VF6xx
- "fsl,vf610-ocotp", "syscon" for VF5xx/VF6xx
#address-cells : Should be 1
#size-cells : Should be 1
reg : Address and length of OTP controller and fuse map registers
@ -11,7 +11,7 @@ Required Properties:
Example for Vybrid VF5xx/VF6xx:
ocotp: ocotp@400a5000 {
compatible = "fsl,vf610-ocotp";
compatible = "fsl,vf610-ocotp", "syscon";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x400a5000 0xCF0>;

1
Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml
View File

@ -40,6 +40,7 @@ properties:
- renesas,r8a77980-sysc # R-Car V3H
- renesas,r8a77990-sysc # R-Car E3
- renesas,r8a77995-sysc # R-Car D3
- renesas,r8a779a0-sysc # R-Car V3U
reg:
maxItems: 1

1
Documentation/devicetree/bindings/reset/renesas,rst.yaml
View File

@ -47,6 +47,7 @@ properties:
- renesas,r8a77980-rst # R-Car V3H
- renesas,r8a77990-rst # R-Car E3
- renesas,r8a77995-rst # R-Car D3
- renesas,r8a779a0-rst # R-Car V3U
reg:
maxItems: 1

6
Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
View File

@ -33,6 +33,9 @@ properties:
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun8i-a23-system-control
- const: allwinner,sun8i-h3-system-control
- items:
- const: allwinner,sun8i-r40-system-control
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun50i-a64-sram-controller
deprecated: true
- const: allwinner,sun50i-a64-system-control
@ -86,6 +89,9 @@ patternProperties:
- items:
- const: allwinner,sun8i-h3-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun8i-r40-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun50i-a64-sram-c1
- const: allwinner,sun4i-a10-sram-c1

8
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -179,6 +179,8 @@ patternProperties:
description: CALAO Systems SAS
"^calxeda,.*":
description: Calxeda
"^caninos,.*":
description: Caninos Loucos Program
"^capella,.*":
description: Capella Microsystems, Inc
"^cascoda,.*":
@ -912,6 +914,8 @@ patternProperties:
description: Ronbo Electronics
"^roofull,.*":
description: Shenzhen Roofull Technology Co, Ltd
"^roseapplepi,.*":
description: RoseapplePi.org
"^samsung,.*":
description: Samsung Semiconductor
"^samtec,.*":
@ -928,6 +932,8 @@ patternProperties:
description: Schindler
"^seagate,.*":
description: Seagate Technology PLC
"^seeed,.*":
description: Seeed Technology Co., Ltd
"^seirobotics,.*":
description: Shenzhen SEI Robotics Co., Ltd
"^semtech,.*":
@ -1224,6 +1230,8 @@ patternProperties:
description: Zodiac Inflight Innovations
"^zinitix,.*":
description: Zinitix Co., Ltd
"^zkmagic,.*":
description: Shenzhen Zkmagic Technology Co., Ltd.
"^zte,.*":
description: ZTE Corp.
"^zyxel,.*":

18
MAINTAINERS
View File

@ -2115,6 +2115,7 @@ M: Steen Hegelund <Steen.Hegelund@microchip.com>
M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
T: git git://github.com/microchip-ung/linux-upstream.git
F: arch/arm64/boot/dts/microchip/
N: sparx5
@ -2130,9 +2131,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
W: http://linux-chenxing.org/
F: Documentation/devicetree/bindings/arm/mstar/*
F: arch/arm/boot/dts/infinity*.dtsi
F: arch/arm/boot/dts/mercury*.dtsi
F: arch/arm/boot/dts/mstar-v7.dtsi
F: arch/arm/boot/dts/mstar-*
F: arch/arm/mach-mstar/
ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
@ -2616,7 +2615,7 @@ M: Tero Kristo <t-kristo@ti.com>
M: Nishanth Menon <nm@ti.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
F: Documentation/devicetree/bindings/arm/ti/k3.txt
F: Documentation/devicetree/bindings/arm/ti/k3.yaml
F: arch/arm64/boot/dts/ti/Makefile
F: arch/arm64/boot/dts/ti/k3-*
F: include/dt-bindings/pinctrl/k3.h
@ -2631,6 +2630,17 @@ M: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
M: Dirk Opfer <dirk@opfer-online.de>
S: Maintained
ARM/TOSHIBA VISCONTI ARCHITECTURE
M: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti.git
F: Documentation/devicetree/bindings/arm/toshiba.yaml
F: Documentation/devicetree/bindings/pinctrl/toshiba,tmpv7700-pinctrl.yaml
F: arch/arm64/boot/dts/toshiba/
F: drivers/pinctrl/visconti/
N: visconti
ARM/UNIPHIER ARCHITECTURE
M: Masahiro Yamada <yamada.masahiro@socionext.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

25
arch/arm/boot/dts/Makefile
View File

@ -43,6 +43,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
at91-smartkiz.dtb \
at91-wb45n.dtb \
at91sam9g15ek.dtb \
at91sam9g25-gardena-smart-gateway.dtb \
at91sam9g25ek.dtb \
at91sam9g35ek.dtb \
at91sam9x25ek.dtb \
@ -127,6 +128,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47094-luxul-xwr-3150-v1.dtb \
bcm47094-netgear-r8500.dtb \
bcm47094-phicomm-k3.dtb \
bcm53016-meraki-mr32.dtb \
bcm94708.dtb \
bcm94709.dtb \
bcm953012er.dtb \
@ -357,6 +359,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \
mps2-an399.dtb
dtb-$(CONFIG_ARCH_MOXART) += \
moxart-uc7112lx.dtb
dtb-$(CONFIG_ARCH_SD5203) += \
sd5203.dtb
dtb-$(CONFIG_SOC_IMX1) += \
imx1-ads.dtb \
imx1-apf9328.dtb
@ -482,6 +486,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-wandboard-revd1.dtb \
imx6dl-yapp4-draco.dtb \
imx6dl-yapp4-hydra.dtb \
imx6dl-yapp4-orion.dtb \
imx6dl-yapp4-ursa.dtb \
imx6q-apalis-eval.dtb \
imx6q-apalis-ixora.dtb \
@ -531,6 +536,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-icore-ofcap12.dtb \
imx6q-icore-rqs.dtb \
imx6q-kp-tpc.dtb \
imx6q-logicpd.dtb \
imx6q-marsboard.dtb \
imx6q-mccmon6.dtb \
imx6q-nitrogen6x.dtb \
@ -585,6 +591,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6qp-zii-rdu2.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \
imx6sl-tolino-shine2hd.dtb \
imx6sl-tolino-shine3.dtb \
imx6sl-warp.dtb
dtb-$(CONFIG_SOC_IMX6SLL) += \
@ -868,7 +875,12 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb \
owl-s500-labrador-base-m.dtb \
owl-s500-roseapplepi.dtb \
owl-s500-sparky.dtb
dtb-$(CONFIG_ARCH_PICOXCELL) += \
picoxcell-pc7302-pc3x2.dtb \
picoxcell-pc7302-pc3x3.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
dtb-$(CONFIG_ARCH_PXA) += \
@ -1047,6 +1059,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32746g-eval.dtb \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp153c-dhcom-drc02.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dhcor-avenger96.dtb \
stm32mp157a-dk1.dtb \
@ -1056,7 +1069,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb \
stm32mp157c-lxa-mc1.dtb
stm32mp157c-lxa-mc1.dtb \
stm32mp157c-odyssey.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
@ -1194,6 +1208,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-s3-lichee-zero-plus.dtb \
sun8i-s3-pinecube.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb \
@ -1356,9 +1371,9 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt8135-evbp1.dtb
dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb
dtb-$(CONFIG_ARCH_MSTARV7) += \
infinity-msc313-breadbee_crust.dtb \
infinity3-msc313e-breadbee.dtb \
mercury5-ssc8336n-midrived08.dtb
mstar-infinity-msc313-breadbee_crust.dtb \
mstar-infinity3-msc313e-breadbee.dtb \
mstar-mercury5-ssc8336n-midrived08.dtb
dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
@ -1371,6 +1386,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-wedge40.dtb \
aspeed-bmc-facebook-wedge100.dtb \
aspeed-bmc-facebook-wedge400.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-facebook-yosemitev2.dtb \
aspeed-bmc-ibm-rainier.dtb \
@ -1381,6 +1397,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-mowgli.dtb \
aspeed-bmc-opp-nicole.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \

2
arch/arm/boot/dts/alpine.dtsi
View File

@ -91,7 +91,7 @@ arch-timer {
};
/* Interrupt Controller */
gic: gic@fb001000 {
gic: interrupt-controller@fb001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#size-cells = <0>;

4
arch/arm/boot/dts/am335x-lxm.dts
View File

@ -160,11 +160,15 @@ &i2c0 {
serial_config1: serial_config1@20 {
compatible = "nxp,pca9539";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
serial_config2: serial_config2@21 {
compatible = "nxp,pca9539";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
tps: tps@2d {

427
arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi Normal file
View File

@ -0,0 +1,427 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 MOXA Inc. - https://www.moxa.com/
*
* Author: Johnson Chen <johnsonch.chen@moxa.com>
*/
#include "am33xx.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
vbat: vbat-regulator {
compatible = "regulator-fixed";
};
/* Power supply provides a fixed 3.3V @3A */
vmmcsd_fixed: vmmcsd-regulator {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
buttons: push_button {
compatible = "gpio-keys";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&minipcie_pins>;
minipcie_pins: pinmux_minipcie {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2_24 */
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
>;
};
push_button_pins: pinmux_push_button {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_ctsn.i2c1_sda */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_rtsn.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_INPUT, MUX_MODE6) /* lcd_data14.uart5_ctsn */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* lcd_data15.uart5_rtsn */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* lcd_data9.uart5_rxd */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE4) /* lcd_data8.uart5_txd */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
/* Slave 2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_crs_dv */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rxer */
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_txen */
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd0 */
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE1) /* rmii2_refclk */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
mmc0_pins_default: pinmux_mmc0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
>;
};
mmc2_pins_default: pinmux_mmc2_pins {
pinctrl-single,pins = <
/* eMMC */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};
spi0_pins: pinmux_spi0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
};
&uart0 {
/* Console */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
&uart1 {
/* UART 1 setting */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart5 {
/* UART 2 setting */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
compatible = "ti,tps65910";
reg = <0x2d>;
};
eeprom: eeprom@50 {
compatible = "atmel,24c16";
pagesize = <16>;
reg = <0x50>;
};
rtc_wdt: rtc_wdt@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <400000>;
gpio_xten: gpio_xten@27 {
compatible = "nxp,pca9535";
gpio-controller;
#gpio-cells = <2>;
reg = <0x27>;
};
};
&usb0 {
dr_mode = "host";
};
&usb1 {
dr_mode = "host";
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
regulator-always-on;
};
vdd2_reg: regulator@3 {
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "vmmc_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
/* Power */
&vbat {
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
&mac {
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
};
&cpsw_emac0 {
status = "okay";
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
status = "okay";
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0 {
ti,no-reset-on-init;
};
&mmc1 {
pinctrl-names = "default";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-0 = <&mmc0_pins_default>;
cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&mmc3 {
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc2_pins_default>;
ti,non-removable;
status = "okay";
};
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@0 {
label = "push_button";
linux,code = <0x100>;
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
};
};
/* SPI Busses */
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
m25p80@0 {
compatible = "mx25l6405d";
spi-max-frequency = <40000000>;
reg = <0>;
spi-cpol;
spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
/* reg : The partition's offset and size within the mtd bank. */
partitions@0 {
label = "MLO";
reg = <0x0 0x80000>;
};
partitions@1 {
label = "U-Boot";
reg = <0x80000 0x100000>;
};
partitions@2 {
label = "U-Boot Env";
reg = <0x180000 0x20000>;
};
};
};

404
arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts
View File

@ -4,39 +4,19 @@
*
* Author: SZ Lin (林上智) <sz.lin@moxa.com>
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-moxa-uc-8100-common.dtsi"
/ {
model = "Moxa UC-8100-ME-T";
compatible = "moxa,uc-8100-me-t", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
vbat: vbat-regulator {
compatible = "regulator-fixed";
};
/* Power supply provides a fixed 3.3V @3A */
vmmcsd_fixed: vmmcsd-regulator {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
leds {
compatible = "gpio-leds";
led1 {
@ -88,237 +68,17 @@ led9 {
default-state = "off";
};
};
buttons: push_button {
compatible = "gpio-keys";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&minipcie_pins>;
minipcie_pins: pinmux_minipcie {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2_24 */
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
>;
};
push_button_pins: pinmux_push_button {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_ctsn.i2c1_sda */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_rtsn.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_INPUT, MUX_MODE6) /* lcd_data14.uart5_ctsn */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* lcd_data15.uart5_rtsn */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* lcd_data9.uart5_rxd */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE4) /* lcd_data8.uart5_txd */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
/* Slave 2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_crs_dv */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rxer */
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_txen */
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* rmii2_td0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE3) /* rmii2_rd0 */
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE1) /* rmii2_refclk */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
mmc0_pins_default: pinmux_mmc0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
>;
};
mmc2_pins_default: pinmux_mmc2_pins {
pinctrl-single,pins = <
/* eMMC */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};
spi0_pins: pinmux_spi0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
};
&uart0 {
/* Console */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
&uart1 {
/* UART 1 setting */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart5 {
/* UART 2 setting */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tpm: tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
tps: tps@2d {
compatible = "ti,tps65910";
reg = <0x2d>;
};
eeprom: eeprom@50 {
compatible = "atmel,24c16";
pagesize = <16>;
reg = <0x50>;
};
rtc_wdt: rtc_wdt@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <400000>;
gpio_xten: gpio_xten@27 {
compatible = "nxp,pca9535";
gpio-controller;
#gpio-cells = <2>;
reg = <0x27>;
};
};
&usb0 {
dr_mode = "host";
};
&usb1 {
dr_mode = "host";
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
@ -336,168 +96,6 @@ vdd2_reg: regulator@3 {
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "vmmc_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
/* Power */
&vbat {
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
&mac {
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
};
&cpsw_emac0 {
status = "okay";
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
status = "okay";
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0 {
ti,no-reset-on-init;
};
&mmc1 {
pinctrl-names = "default";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-0 = <&mmc0_pins_default>;
cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&mmc3 {
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc2_pins_default>;
non-removable;
status = "okay";
};
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@0 {
label = "push_button";
linux,code = <0x100>;
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
};
};
/* SPI Busses */
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
m25p80@0 {
compatible = "mx25l6405d";
spi-max-frequency = <40000000>;
reg = <0>;
spi-cpol;
spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
/* reg : The partition's offset and size within the mtd bank. */
partitions@0 {
label = "MLO";
reg = <0x0 0x80000>;
};
partitions@1 {
label = "U-Boot";
reg = <0x80000 0x100000>;
};
partitions@2 {
label = "U-Boot Env";
reg = <0x180000 0x20000>;
};
};
};

4
arch/arm/boot/dts/am335x-sbc-t335.dts
View File

@ -155,13 +155,13 @@ gpio_ext: pca9555@26 {
gpio-controller;
#gpio-cells = <2>;
reg = <0x26>;
dvi_ena {
dvi-ena-hog {
gpio-hog;
gpios = <13 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "dvi-enable";
};
lcd_ena {
lcd-ena-hog {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-high;

2
arch/arm/boot/dts/am33xx.dtsi
View File

@ -172,7 +172,7 @@ mpu {
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
ocp {
ocp: ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

4
arch/arm/boot/dts/am3517-evm-ui.dtsi
View File

@ -183,14 +183,14 @@ tvp5146@5c {
};
&mcbsp1 {
status = "ok";
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
};
&mcbsp2 {
status = "ok";
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;

2
arch/arm/boot/dts/am3517-evm.dts
View File

@ -176,7 +176,7 @@ &davinci_mdio {
};
&dss {
status = "ok";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_dpi_pins>;

8
arch/arm/boot/dts/am3874-iceboard.dts
View File

@ -195,7 +195,7 @@ u41: pca9575@20 {
"FMCA_PG_C2M", "FMCA_PRSNT_M2C_L", "FMCA_CLK_DIR", "SFP_LOS",
"FMCB_EN_12V0", "FMCB_EN_3V3", "FMCB_EN_VADJ", "FMCB_PG_M2C",
"FMCB_PG_C2M", "FMCB_PRSNT_M2C_L", "FMCB_CLK_DIR", "SFP_ModPrsL";
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
};
u42: pca9575@21 {
@ -208,7 +208,7 @@ u42: pca9575@21 {
"QSFPA_LPMode", "QSFPB_ModPrsL", "QSFPB_IntL", "QSFPB_ResetL",
"SFP_TxFault", "SFP_TxDisable", "SFP_RS0", "SFP_RS1",
"QSFPB_ModSelL", "QSFPB_LPMode", "SEL_SFP", "ARM_MR";
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
};
u48: pca9575@22 {
@ -227,7 +227,7 @@ u48: pca9575@22 {
"GP_SW5", "GP_SW6", "GP_SW7", "GP_SW8",
"GP_LED8", "GP_LED7", "GP_LED6", "GP_LED5",
"GP_LED4", "GP_LED3", "GP_LED2", "GP_LED1";
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
};
u59: pca9575@23 {
@ -240,7 +240,7 @@ u59: pca9575@23 {
"GTX1V8PowerFault", "PHYAPowerFault", "PHYBPowerFault", "ArmPowerFault",
"BP_SLOW_GPIO0", "BP_SLOW_GPIO1", "BP_SLOW_GPIO2", "BP_SLOW_GPIO3",
"BP_SLOW_GPIO4", "BP_SLOW_GPIO5", "__unused_u59_p16", "__unused_u59_p17";
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
};
tmp100@48 { compatible = "ti,tmp100"; reg = <0x48>; };

4
arch/arm/boot/dts/am4372.dtsi
View File

@ -35,8 +35,8 @@ aliases {
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
spi0 = &qspi;
};

14
arch/arm/boot/dts/am437x-cm-t43.dts
View File

@ -325,17 +325,15 @@ partition@100000 {
};
};
&mac {
&mac_sw {
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
@ -346,16 +344,16 @@ ethphy1: ethernet-phy@1 {
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&dwc3_1 {

15
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@ -906,28 +906,31 @@ &usb2 {
status = "okay";
};
&mac {
slaves = <1>;
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
status = "disabled";
};
&elm {
@ -1024,7 +1027,7 @@ partition@9 {
};
&dss {
status = "ok";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_pins>;

13
arch/arm/boot/dts/am437x-idk-evm.dts
View File

@ -483,28 +483,31 @@ partition@6 {
};
};
&mac {
slaves = <1>;
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
status = "disabled";
};
&rtc {

71
arch/arm/boot/dts/am437x-l4.dtsi
View File

@ -520,56 +520,59 @@ target-module@100000 { /* 0x4a100000, ap 3 04.0 */
#size-cells = <1>;
ranges = <0x0 0x100000 0x8000>;
mac: ethernet@0 {
compatible = "ti,am4372-cpsw","ti,cpsw";
reg = <0x0 0x800
0x1200 0x100>;
mac_sw: switch@0 {
compatible = "ti,am4372-cpsw","ti,cpsw-switch";
reg = <0x0 0x4000>;
ranges = <0 0 0x4000>;
clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;
clock-names = "fck", "50mclk";
assigned-clocks = <&dpll_clksel_mac_clk>;
assigned-clock-rates = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
syscon = <&scm_conf>;
status = "disabled";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
<&dpll_clksel_mac_clk>;
clock-names = "fck", "cpts", "50mclk";
assigned-clocks = <&dpll_clksel_mac_clk>;
assigned-clock-rates = <50000000>;
status = "disabled";
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
mac_control = <0x20>;
slaves = <2>;
active_slave = <0>;
cpts_clock_mult = <0x80000000>;
cpts_clock_shift = <29>;
ranges = <0 0 0x8000>;
syscon = <&scm_conf>;
interrupt-names = "rx_thresh", "rx", "tx", "misc";
davinci_mdio: mdio@1000 {
compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
reg = <0x1000 0x100>;
clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
clock-names = "fck";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
status = "disabled";
};
cpsw_emac0: slave@200 {
/* Filled in by U-Boot */
cpsw_port1: port@1 {
reg = <1>;
label = "port1";
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 1 0>;
};
cpsw_emac1: slave@300 {
/* Filled in by U-Boot */
cpsw_port2: port@2 {
reg = <2>;
label = "port2";
mac-address = [ 00 00 00 00 00 00 ];
phys = <&phy_gmii_sel 2 0>;
};
};
davinci_mdio_sw: mdio@1000 {
compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio";
clocks = <&cpsw_125mhz_gclk>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
reg = <0x1000 0x100>;
};
cpts {
clocks = <&cpsw_cpts_rft_clk>;
clock-names = "cpts";
};
};
};
target-module@200000 { /* 0x4a200000, ap 7 02.0 */

2
arch/arm/boot/dts/am437x-sbc-t43.dts
View File

@ -136,7 +136,7 @@ &mmc1 {
};
&dss {
status = "ok";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_pinctrl_default>;

14
arch/arm/boot/dts/am437x-sk-evm.dts
View File

@ -792,19 +792,17 @@ partition@6 {
};
};
&mac {
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
@ -815,16 +813,16 @@ ethphy1: ethernet-phy@5 {
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&elm {

15
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -550,29 +550,32 @@ &mmc1 {
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&mac {
&mac_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
slaves = <1>;
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@16 {
reg = <16>;
};
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rmii";
phys = <&phy_gmii_sel 1 1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
status = "disabled";
};
&i2c0 {
@ -952,7 +955,7 @@ &hdq {
};
&dss {
status = "ok";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dss_pins>;

27
arch/arm/boot/dts/am571x-idk.dts
View File

@ -208,30 +208,3 @@ &mmc2 {
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
};
&mac_sw {
pinctrl-names = "default", "sleep";
status = "okay";
};
&cpsw_port1 {
phy-handle = <&ethphy0_sw>;
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
phy-handle = <&ethphy1_sw>;
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <2>;
};
&davinci_mdio_sw {
ethphy0_sw: ethernet-phy@0 {
reg = <0>;
};
ethphy1_sw: ethernet-phy@1 {
reg = <1>;
};
};

14
arch/arm/boot/dts/am5729-beagleboneai.dts
View File

@ -488,25 +488,29 @@ &uart1 {
status = "okay";
};
&davinci_mdio {
&davinci_mdio_sw {
reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>;
phy0: ethernet-phy@1 {
phy0: ethernet-phy@4 {
reg = <4>;
eee-broken-100tx;
eee-broken-1000t;
};
};
&mac {
slaves = <1>;
&mac_sw {
status = "okay";
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&phy0>;
phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>;
};
&cpsw_port2 {
status = "disabled";
};
&ocp {

5
arch/arm/boot/dts/am572x-idk.dts
View File

@ -27,8 +27,3 @@ &mmc2 {
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};
&mac {
status = "okay";
dual_emac;
};

5
arch/arm/boot/dts/am574x-idk.dts
View File

@ -36,11 +36,6 @@ &mmc2 {
pinctrl-2 = <&mmc2_pins_default>;
};
&mac {
status = "okay";
dual_emac;
};
&m_can0 {
status = "disabled";
};

19
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
View File

@ -451,7 +451,7 @@ &uart3 {
<&dra7_pmx_core 0x3f8>;
};
&davinci_mdio {
&davinci_mdio_sw {
phy0: ethernet-phy@1 {
reg = <1>;
};
@ -461,21 +461,20 @@ phy1: ethernet-phy@2 {
};
};
&mac {
&mac_sw {
status = "okay";
dual_emac;
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&phy0>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&phy1>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&mmc1 {
@ -582,13 +581,13 @@ map0 {
};
&dss {
status = "ok";
status = "okay";
vdda_video-supply = <&ldoln_reg>;
};
&hdmi {
status = "ok";
status = "okay";
vdda-supply = <&ldo4_reg>;
port {
@ -599,7 +598,7 @@ hdmi_out: endpoint {
};
&pcie1_rc {
status = "ok";
status = "okay";
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
};

13
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
View File

@ -546,27 +546,26 @@ touchscreen@1 {
};
};
&mac {
&mac_sw {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_pins_default>;
pinctrl-1 = <&cpsw_pins_sleep>;
dual_emac;
};
&cpsw_emac0 {
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <0>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_pins_default>;
pinctrl-1 = <&davinci_mdio_pins_sleep>;

14
arch/arm/boot/dts/am57xx-idk-common.dtsi
View File

@ -448,19 +448,23 @@ &rtc {
ext-clk-src;
};
&cpsw_emac0 {
&mac_sw {
status = "okay";
};
&cpsw_port1 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>;
ti,dual-emac-pvid = <1>;
};
&cpsw_emac1 {
&cpsw_port2 {
phy-handle = <&ethphy1>;
phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>;
ti,dual-emac-pvid = <2>;
};
&davinci_mdio {
&davinci_mdio_sw {
ethphy0: ethernet-phy@0 {
reg = <0>;
};

4
arch/arm/boot/dts/am57xx-sbc-am57x.dts
View File

@ -120,7 +120,7 @@ pca9555: pca9555@20 {
};
&dss {
status = "ok";
status = "okay";
vdda_video-supply = <&ldoln_reg>;
@ -148,7 +148,7 @@ lcd_in: endpoint {
};
&hdmi {
status = "ok";
status = "okay";
vdda-supply = <&ldo4_reg>;
pinctrl-names = "default";

3
arch/arm/boot/dts/animeo_ip.dts
View File

@ -26,7 +26,7 @@ chosen {
stdout-path = &usart2;
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -81,6 +81,7 @@ mmc0: mmc@fffa8000 {
pinctrl-0 = <&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@1 {

2
arch/arm/boot/dts/arm-realview-eb.dtsi
View File

@ -390,7 +390,7 @@ wdog: watchdog@10010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};

20
arch/arm/boot/dts/arm-realview-pb11mp.dts
View File

@ -546,7 +546,7 @@ watchdog@1000f000 {
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@ -556,7 +556,7 @@ watchdog@10010000 {
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
timer01: timer@10011000 {
@ -568,8 +568,8 @@ timer01: timer@10011000 {
clocks = <&sp810_syscon 0>,
<&sp810_syscon 1>,
<&pclk>;
clock-names = "timerclk0",
"timerclk1",
clock-names = "timer0clk",
"timer1clk",
"apb_pclk";
};
@ -582,8 +582,8 @@ timer23: timer@10012000 {
clocks = <&sp810_syscon 2>,
<&sp810_syscon 3>,
<&pclk>;
clock-names = "timerclk2",
"timerclk3",
clock-names = "timer0clk",
"timer1clk",
"apb_pclk";
};
@ -645,16 +645,16 @@ rtc: rtc@10017000 {
timer45: timer@10018000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10018000 0x1000>;
clocks = <&timclk>, <&pclk>;
clock-names = "timer", "apb_pclk";
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer0clk", "timer1clk", "apb_pclk";
status = "disabled";
};
timer67: timer@10019000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10019000 0x1000>;
clocks = <&timclk>, <&pclk>;
clock-names = "timer", "apb_pclk";
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer0clk", "timer1clk", "apb_pclk";
status = "disabled";
};

4
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@ -381,7 +381,7 @@ wdog0: watchdog@1000f000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x1000f000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@ -389,7 +389,7 @@ wdog1: watchdog@10010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};

17
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
View File

@ -1571,3 +1571,20 @@ &sdhci0 {
&sdhci1 {
status = "disabled";
};
&fmc_flash0 {
#include "facebook-bmc-flash-layout.dtsi"
};
&fmc_flash1 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x2000000>;
label = "flash1";
};
};
};

47
arch/arm/boot/dts/aspeed-bmc-facebook-minipack.dts
View File

@ -88,17 +88,60 @@ &wdt2 {
*/
&fmc_flash0 {
partitions {
data0@1c00000 {
reg = <0x1c00000 0x2400000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* u-boot partition: 384KB.
*/
u-boot@0 {
reg = <0x0 0x60000>;
label = "u-boot";
};
/*
* u-boot environment variables: 128KB.
*/
u-boot-env@60000 {
reg = <0x60000 0x20000>;
label = "env";
};
/*
* FIT image: 59.5 MB.
*/
fit@80000 {
reg = <0x80000 0x3b80000>;
label = "fit";
};
/*
* "data0" partition (4MB) is reserved for persistent
* data store.
*/
data0@3800000 {
reg = <0x3c00000 0x400000>;
label = "data0";
};
/*
* "flash0" partition (covering the entire flash) is
* explicitly created to avoid breaking legacy applications.
*/
flash0@0 {
reg = <0x0 0x4000000>;
label = "flash0";
};
};
};
&fmc_flash1 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x4000000>;
};

5
arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts
View File

@ -48,7 +48,7 @@ &fmc {
flash@0 {
status = "okay";
m25p,fast-read;
label = "fmc0";
label = "spi0.0";
#include "facebook-bmc-flash-layout.dtsi"
};
};
@ -71,7 +71,8 @@ &uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
&pinctrl_rxd4_default
&pinctrl_ndts4_default>;
};
&uart5 {

420
arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts Normal file
View File

@ -0,0 +1,420 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2019 Facebook Inc.
/dts-v1/;
#include <dt-bindings/gpio/aspeed-gpio.h>
#include "ast2500-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Wedge 400 BMC";
compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
aliases {
/*
* PCA9548 (2-0070) provides 8 channels connecting to
* SCM (System Controller Module).
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
/*
* PCA9548 (8-0070) provides 8 channels connecting to
* SMB (Switch Main Board).
*/
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
/*
* PCA9548 (11-0076) provides 8 channels connecting to
* FCM (Fan Controller Module).
*/
i2c32 = &imux32;
i2c33 = &imux33;
i2c34 = &imux34;
i2c35 = &imux35;
i2c36 = &imux36;
i2c37 = &imux37;
i2c38 = &imux38;
i2c39 = &imux39;
spi2 = &spi_gpio;
};
chosen {
stdout-path = &uart1;
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
};
ast-adc-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
};
/*
* GPIO-based SPI Master is required to access SPI TPM, because
* full-duplex SPI transactions are not supported by ASPEED SPI
* Controllers.
*/
spi_gpio: spi-gpio {
status = "okay";
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_LOW>;
gpio-sck = <&gpio ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
tpmdev@0 {
compatible = "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>;
reg = <0>;
};
};
};
/*
* Both firmware flashes are 128MB on Wedge400 BMC.
*/
&fmc_flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* u-boot partition: 384KB.
*/
u-boot@0 {
reg = <0x0 0x60000>;
label = "u-boot";
};
/*
* u-boot environment variables: 128KB.
*/
u-boot-env@60000 {
reg = <0x60000 0x20000>;
label = "env";
};
/*
* FIT image: 123.5 MB.
*/
fit@80000 {
reg = <0x80000 0x7b80000>;
label = "fit";
};
/*
* "data0" partition (4MB) is reserved for persistent
* data store.
*/
data0@3800000 {
reg = <0x7c00000 0x800000>;
label = "data0";
};
/*
* "flash0" partition (covering the entire flash) is
* explicitly created to avoid breaking legacy applications.
*/
flash0@0 {
reg = <0x0 0x8000000>;
label = "flash0";
};
};
};
&fmc_flash1 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x8000000>;
label = "flash1";
};
};
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
};
/*
* I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC
* communication.
*/
&i2c0 {
status = "okay";
multi-master;
bus-frequency = <1000000>;
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux28: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux29: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux30: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux31: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
i2c-switch@76 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x76>;
i2c-mux-idle-disconnect;
imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux34: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux35: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux36: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux37: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux38: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux39: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&adc {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
&sdhci1 {
/*
* DMA mode needs to be disabled to avoid conflicts with UHCI
* Controller in AST2500 SoC.
*/
sdhci-caps-mask = <0x0 0x580000>;
};

17
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts
View File

@ -108,3 +108,20 @@ &i2c12 {
&i2c13 {
status = "okay";
};
&fmc_flash0 {
#include "facebook-bmc-flash-layout.dtsi"
};
&fmc_flash1 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x2000000>;
label = "flash1";
};
};
};

17
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
View File

@ -4,6 +4,7 @@
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
@ -53,6 +54,7 @@ flash_memory: region@B8000000 {
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
reg = <0xbf000000 0x01000000>; /* 16M */
};
};
@ -178,6 +180,10 @@ &emmc_controller {
status = "okay";
};
&pinctrl_emmc_default {
bias-disable;
};
&emmc {
status = "okay";
};
@ -698,6 +704,7 @@ eeprom@53 {
};
&i2c7 {
multi-master;
status = "okay";
si7021-a20@20 {
@ -831,6 +838,11 @@ gpio@15 {
};
};
ibm-panel@62 {
compatible = "ibm,op-panel";
reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
};
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
@ -1121,3 +1133,8 @@ flash@0 {
spi-max-frequency = <100000000>;
};
};
&xdma {
status = "okay";
memory-region = <&vga_memory>;
};

662
arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts Normal file
View File

@ -0,0 +1,662 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Mowgli BMC";
compatible = "ibm,mowgli-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 6)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 2)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 0)>;
};
id-button {
label = "id-button";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <1000>;
fan0-presence {
label = "fan0-presence";
gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
linux,code = <10>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
linux,code = <11>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
fan4-presence {
label = "fan4-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
};
leds {
compatible = "gpio-leds";
front-fault {
retain-state-shutdown;
default-state = "keep";
gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
};
power-button {
retain-state-shutdown;
default-state = "keep";
gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
};
front-id {
retain-state-shutdown;
default-state = "keep";
gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
};
fan0 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
};
fan1 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
};
fan2 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
};
fan3 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
};
fan4 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
};
};
fsi: gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
};
iio-hwmon-12v {
compatible = "iio-hwmon";
io-channels = <&adc 0>;
};
iio-hwmon-5v {
compatible = "iio-hwmon";
io-channels = <&adc 1>;
};
iio-hwmon-3v {
compatible = "iio-hwmon";
io-channels = <&adc 2>;
};
iio-hwmon-vdd {
compatible = "iio-hwmon";
io-channels = <&adc 3>;
};
iio-hwmon-vcs {
compatible = "iio-hwmon";
io-channels = <&adc 5>;
};
iio-hwmon-vdn {
compatible = "iio-hwmon";
io-channels = <&adc 7>;
};
iio-hwmon-vio {
compatible = "iio-hwmon";
io-channels = <&adc 9>;
};
iio-hwmon-vddra {
compatible = "iio-hwmon";
io-channels = <&adc 11>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 12>;
};
iio-hwmon-vddrb {
compatible = "iio-hwmon";
io-channels = <&adc 13>;
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@8 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@9 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x1F80000 >;
label = "obmc-ubi";
};
};
};
flash@1 {
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "alt-u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "alt-u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x1F80000 >;
label = "alt-obmc-ubi";
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
};
&i2c1 {
status = "disabled";
};
&i2c2 {
status = "okay";
/* CPU MFG CONN */
};
&i2c3 {
status = "okay";
/* APSS */
/* CPLD */
/* PCA9516 (repeater) ->
* CLK Buffer 9FGS9092
* Power Supply 0
* Power Supply 1
* PCA 9552 LED
*/
pca9552: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
power-supply@68 {
compatible = "ibm,cffps1";
reg = <0x68>;
};
power-supply@69 {
compatible = "ibm,cffps1";
reg = <0x69>;
};
};
&i2c4 {
status = "okay";
/* CP0 VDD & VCS : IR35221 */
/* CP0 VDN & VIO : IR35221 */
/* CP0 VDDR : IR35221 */
ir35221@28 {
compatible = "infineon,ir35221";
reg = <0x28>;
};
ir35221@29 {
compatible = "infineon,ir35221";
reg = <0x29>;
};
ir35221@2d {
compatible = "infineon,ir35221";
reg = <0x2d>;
};
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&i2c8 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
};
&i2c9 {
status = "okay";
/* PCIe G3 x16 slot */
};
&i2c10 {
status = "disabled";
};
&i2c11 {
status = "okay";
/* CPLD */
/* TPM */
/* RTC RX8900CE */
/* TMP275A */
/* TMP275A */
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
};
&i2c12 {
status = "disabled";
};
&i2c13 {
status = "disabled";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default
&pinctrl_adc8_default
&pinctrl_adc9_default
&pinctrl_adc10_default
&pinctrl_adc11_default
&pinctrl_adc12_default
&pinctrl_adc13_default
&pinctrl_adc14_default
&pinctrl_adc15_default>;
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
aspeed,alt-boot;
};
&ibt {
status = "okay";
};
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"

7
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
View File

@ -4,6 +4,7 @@
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
@ -438,7 +439,13 @@ aliases {
};
&i2c0 {
multi-master;
status = "okay";
ibm-panel@62 {
compatible = "ibm,op-panel";
reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
};
};
&i2c1 {

1
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -425,7 +425,6 @@ vuart: serial@1e787000 {
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_APB>;
no-loopback-test;
aspeed,sirq-polarity-sense = <&syscon 0x70 25>;
status = "disabled";
};

13
arch/arm/boot/dts/ast2500-facebook-netbmc-common.dtsi
View File

@ -47,25 +47,12 @@ fmc_flash0: flash@0 {
status = "okay";
m25p,fast-read;
label = "spi0.0";
#include "facebook-bmc-flash-layout.dtsi"
};
fmc_flash1: flash@1 {
status = "okay";
m25p,fast-read;
label = "spi0.1";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x2000000>;
label = "flash1";
};
};
};
};

3
arch/arm/boot/dts/at91-ariag25.dts
View File

@ -22,7 +22,7 @@ chosen {
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait";
};
memory {
memory@20000000 {
/* 128 MB, change this for 256 MB revision */
reg = <0x20000000 0x8000000>;
};
@ -93,6 +93,7 @@ &mmc0 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {

3
arch/arm/boot/dts/at91-ariettag25.dts
View File

@ -15,7 +15,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x8000000>;
};
@ -48,6 +48,7 @@ &mmc0 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {

3
arch/arm/boot/dts/at91-cosino.dtsi
View File

@ -20,7 +20,7 @@ chosen {
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
};
memory {
memory@20000000 {
reg = <0x20000000 0x8000000>;
};
@ -112,6 +112,7 @@ &mmc0 {
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {

1
arch/arm/boot/dts/at91-cosino_mega2560.dts
View File

@ -34,6 +34,7 @@ &mmc1 {
pinctrl-0 = <
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {

3
arch/arm/boot/dts/at91-foxg20.dts
View File

@ -17,7 +17,7 @@ chosen {
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -55,6 +55,7 @@ mmc0: mmc@fffa8000 {
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@1 {

2
arch/arm/boot/dts/at91-kizbox.dts
View File

@ -18,7 +18,7 @@ chosen {
stdout-path = &dbgu;
};
memory {
memory@20000000 {
reg = <0x20000000 0x2000000>;
};

2
arch/arm/boot/dts/at91-kizbox2-common.dtsi
View File

@ -17,7 +17,7 @@ chosen {
stdout-path = &dbgu;
};
memory {
memory@20000000 {
reg = <0x20000000 0x10000000>;
};

2
arch/arm/boot/dts/at91-kizboxmini-common.dtsi
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = &dbgu;
};
memory {
memory@20000000 {
reg = <0x20000000 0x8000000>;
};

2
arch/arm/boot/dts/at91-linea.dtsi
View File

@ -13,7 +13,7 @@ / {
compatible = "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
};

3
arch/arm/boot/dts/at91-qil_a9260.dts
View File

@ -14,7 +14,7 @@ chosen {
bootargs = "console=ttyS0,115200";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -52,6 +52,7 @@ mmc0: mmc@fffa8000 {
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot0_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {
reg = <0>;

3
arch/arm/boot/dts/at91-sam9_l9260.dts
View File

@ -15,7 +15,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -49,6 +49,7 @@ &pinctrl_board_mmc0
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@1 {

2
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x10000000>;
};

2
arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi
View File

@ -9,7 +9,7 @@ / {
model = "Aries/DENX MA5D4";
compatible = "aries,ma5d4", "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
memory {
memory@20000000 {
reg = <0x20000000 0x10000000>;
};

2
arch/arm/boot/dts/at91-sama5d4_xplained.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x20000000>;
};

2
arch/arm/boot/dts/at91-sama5d4ek.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x20000000>;
};

2
arch/arm/boot/dts/at91-som60.dtsi
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = &dbgu;
};
memory {
memory@20000000 {
reg = <0x20000000 0x8000000>;
};

2
arch/arm/boot/dts/at91-vinco.dts
View File

@ -17,7 +17,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};

3
arch/arm/boot/dts/at91-wb45n.dtsi
View File

@ -17,7 +17,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -145,6 +145,7 @@ &usb2 {
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;

2
arch/arm/boot/dts/at91-wb50n.dtsi
View File

@ -17,7 +17,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
};

11
arch/arm/boot/dts/at91rm9200.dtsi
View File

@ -39,16 +39,17 @@ aliases {
ssc2 = &ssc2;
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm920t";
device_type = "cpu";
reg = <0>;
};
};
memory {
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x04000000>;
};
@ -70,6 +71,9 @@ main_xtal: main_xtal {
sram: sram@200000 {
compatible = "mmio-sram";
reg = <0x00200000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00200000 0x4000>;
};
ahb {
@ -169,7 +173,6 @@ mmc0: mmc@fffb4000 {
clock-names = "mci_clk";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
status = "disabled";
};

2
arch/arm/boot/dts/at91rm9200ek.dts
View File

@ -15,7 +15,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};

11
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -36,16 +36,17 @@ aliases {
ssc0 = &ssc0;
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
memory {
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x04000000>;
};
@ -73,6 +74,9 @@ adc_op_clk: adc_op_clk{
sram0: sram@2ff000 {
compatible = "mmio-sram";
reg = <0x002ff000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x002ff000 0x2000>;
};
ahb {
@ -650,7 +654,6 @@ mmc0: mmc@fffa8000 {
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "mci_clk";
status = "disabled";

3
arch/arm/boot/dts/at91sam9260ek.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = &dbgu;
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -55,6 +55,7 @@ &pinctrl_board_mmc0_slot1
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@1 {
reg = <1>;

10
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -33,16 +33,17 @@ aliases {
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
memory {
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x08000000>;
};
@ -64,6 +65,9 @@ slow_xtal: slow_xtal {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x28000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00300000 0x28000>;
};
ahb {

2
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};

15
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -35,16 +35,17 @@ aliases {
};
cpus {
#address-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
cpu {
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
memory {
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x08000000>;
};
@ -66,11 +67,17 @@ slow_xtal: slow_xtal {
sram0: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x14000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00300000 0x14000>;
};
sram1: sram@500000 {
compatible = "mmio-sram";
reg = <0x00500000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00500000 0x4000>;
};
ahb {
@ -647,7 +654,6 @@ mmc0: mmc@fff80000 {
compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
@ -659,7 +665,6 @@ mmc1: mmc@fff84000 {
compatible = "atmel,hsmci";
reg = <0xfff84000 0x600>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;

3
arch/arm/boot/dts/at91sam9263ek.dts
View File

@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -72,6 +72,7 @@ &pinctrl_board_mmc0
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot0_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {
reg = <0>;

5
arch/arm/boot/dts/at91sam9g20.dtsi
View File

@ -11,7 +11,7 @@ / {
model = "Atmel AT91SAM9G20 family SoC";
compatible = "atmel,at91sam9g20";
memory {
memory@20000000 {
reg = <0x20000000 0x08000000>;
};
@ -22,6 +22,9 @@ sram0: sram@2ff000 {
sram1: sram@2fc000 {
compatible = "mmio-sram";
reg = <0x002fc000 0x8000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x002fc000 0x8000>;
};
ahb {

3
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View File

@ -13,7 +13,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@20000000 {
reg = <0x20000000 0x4000000>;
};
@ -93,6 +93,7 @@ &pinctrl_board_mmc0_slot1
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@1 {
reg = <1>;

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