forked from luck/tmp_suning_uos_patched
mfd: Refactor wm831x AUXADC handling into a separate file
In preparation for some additional work on the wm831x AUXADC code move the support into a separate file. This is a simple code motion patch, there should be no functional changes. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Mark Brown
Samuel Ortiz
parent
c1a82780b4
commit
e69b6de181
@ -23,6 +23,7 @@ obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o tmio_core.o
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obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
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wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
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wm831x-objs += wm831x-auxadc.o
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obj-$(CONFIG_MFD_WM831X) += wm831x.o
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obj-$(CONFIG_MFD_WM831X_I2C) += wm831x-i2c.o
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obj-$(CONFIG_MFD_WM831X_SPI) += wm831x-spi.o
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199
drivers/mfd/wm831x-auxadc.c
Normal file
199
drivers/mfd/wm831x-auxadc.c
Normal file
@ -0,0 +1,199 @@
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/*
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* wm831x-auxadc.c -- AUXADC for Wolfson WM831x PMICs
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*
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* Copyright 2009-2011 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mfd/core.h>
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#include <linux/slab.h>
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#include <linux/mfd/wm831x/core.h>
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#include <linux/mfd/wm831x/pdata.h>
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#include <linux/mfd/wm831x/irq.h>
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#include <linux/mfd/wm831x/auxadc.h>
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#include <linux/mfd/wm831x/otp.h>
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#include <linux/mfd/wm831x/regulator.h>
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/**
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* wm831x_auxadc_read: Read a value from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret, src, irq_masked, timeout;
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/* Are we using the interrupt? */
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irq_masked = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_1_MASK);
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irq_masked &= WM831X_AUXADC_DATA_EINT;
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mutex_lock(&wm831x->auxadc_lock);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_ENA, WM831X_AUX_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
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goto out;
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}
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/* We force a single source at present */
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src = input;
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ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
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1 << src);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
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goto out;
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}
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/* Clear any notification from a very late arriving interrupt */
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try_wait_for_completion(&wm831x->auxadc_done);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
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goto disable;
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}
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if (irq_masked) {
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/* If we're not using interrupts then poll the
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* interrupt status register */
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timeout = 5;
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while (timeout) {
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msleep(1);
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ret = wm831x_reg_read(wm831x,
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WM831X_INTERRUPT_STATUS_1);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"ISR 1 read failed: %d\n", ret);
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goto disable;
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}
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/* Did it complete? */
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if (ret & WM831X_AUXADC_DATA_EINT) {
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wm831x_reg_write(wm831x,
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WM831X_INTERRUPT_STATUS_1,
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WM831X_AUXADC_DATA_EINT);
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break;
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} else {
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dev_err(wm831x->dev,
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"AUXADC conversion timeout\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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goto disable;
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}
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wm831x->auxadc_data = ret;
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} else {
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/* If we are using interrupts then wait for the
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* interrupt to complete. Use an extremely long
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* timeout to handle situations with heavy load where
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* the notification of the interrupt may be delayed by
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* threaded IRQ handling. */
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if (!wait_for_completion_timeout(&wm831x->auxadc_done,
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msecs_to_jiffies(500))) {
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dev_err(wm831x->dev, "Timed out waiting for AUXADC\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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src = ((wm831x->auxadc_data & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (src == 14)
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src = WM831X_AUX_CAL;
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if (src != input) {
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dev_err(wm831x->dev, "Data from source %d not %d\n",
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src, input);
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ret = -EINVAL;
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} else {
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ret = wm831x->auxadc_data & WM831X_AUX_DATA_MASK;
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}
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disable:
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wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
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out:
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mutex_unlock(&wm831x->auxadc_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
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static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
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{
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struct wm831x *wm831x = irq_data;
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int ret;
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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wm831x->auxadc_data = 0xffff;
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} else {
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wm831x->auxadc_data = ret;
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}
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complete(&wm831x->auxadc_done);
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return IRQ_HANDLED;
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}
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/**
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* wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret;
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ret = wm831x_auxadc_read(wm831x, input);
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if (ret < 0)
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return ret;
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ret *= 1465;
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
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void wm831x_auxadc_init(struct wm831x *wm831x)
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{
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int ret;
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mutex_init(&wm831x->auxadc_lock);
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init_completion(&wm831x->auxadc_done);
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if (wm831x->irq_base) {
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ret = request_threaded_irq(wm831x->irq_base +
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WM831X_IRQ_AUXADC_DATA,
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NULL, wm831x_auxadc_irq, 0,
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"auxadc", wm831x);
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if (ret < 0)
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dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
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ret);
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}
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}
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@ -306,161 +306,6 @@ int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
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}
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EXPORT_SYMBOL_GPL(wm831x_set_bits);
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/**
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* wm831x_auxadc_read: Read a value from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret, src, irq_masked, timeout;
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/* Are we using the interrupt? */
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irq_masked = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_1_MASK);
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irq_masked &= WM831X_AUXADC_DATA_EINT;
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mutex_lock(&wm831x->auxadc_lock);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_ENA, WM831X_AUX_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
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goto out;
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}
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/* We force a single source at present */
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src = input;
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ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
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1 << src);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
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goto out;
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}
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/* Clear any notification from a very late arriving interrupt */
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try_wait_for_completion(&wm831x->auxadc_done);
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ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
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WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
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if (ret < 0) {
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dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
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goto disable;
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}
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if (irq_masked) {
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/* If we're not using interrupts then poll the
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* interrupt status register */
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timeout = 5;
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while (timeout) {
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msleep(1);
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ret = wm831x_reg_read(wm831x,
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WM831X_INTERRUPT_STATUS_1);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"ISR 1 read failed: %d\n", ret);
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goto disable;
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}
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/* Did it complete? */
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if (ret & WM831X_AUXADC_DATA_EINT) {
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wm831x_reg_write(wm831x,
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WM831X_INTERRUPT_STATUS_1,
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WM831X_AUXADC_DATA_EINT);
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break;
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} else {
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dev_err(wm831x->dev,
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"AUXADC conversion timeout\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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goto disable;
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}
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wm831x->auxadc_data = ret;
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} else {
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/* If we are using interrupts then wait for the
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* interrupt to complete. Use an extremely long
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* timeout to handle situations with heavy load where
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* the notification of the interrupt may be delayed by
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* threaded IRQ handling. */
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if (!wait_for_completion_timeout(&wm831x->auxadc_done,
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msecs_to_jiffies(500))) {
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dev_err(wm831x->dev, "Timed out waiting for AUXADC\n");
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ret = -EBUSY;
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goto disable;
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}
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}
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src = ((wm831x->auxadc_data & WM831X_AUX_DATA_SRC_MASK)
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>> WM831X_AUX_DATA_SRC_SHIFT) - 1;
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if (src == 14)
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src = WM831X_AUX_CAL;
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if (src != input) {
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dev_err(wm831x->dev, "Data from source %d not %d\n",
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src, input);
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ret = -EINVAL;
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} else {
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ret = wm831x->auxadc_data & WM831X_AUX_DATA_MASK;
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}
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disable:
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wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
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out:
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mutex_unlock(&wm831x->auxadc_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
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static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
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{
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struct wm831x *wm831x = irq_data;
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int ret;
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ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
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if (ret < 0) {
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dev_err(wm831x->dev,
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"Failed to read AUXADC data: %d\n", ret);
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wm831x->auxadc_data = 0xffff;
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} else {
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wm831x->auxadc_data = ret;
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}
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complete(&wm831x->auxadc_done);
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return IRQ_HANDLED;
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}
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/**
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* wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
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*
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* @wm831x: Device to read from.
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* @input: AUXADC input to read.
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*/
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int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
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{
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int ret;
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ret = wm831x_auxadc_read(wm831x, input);
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if (ret < 0)
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return ret;
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ret *= 1465;
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
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static struct resource wm831x_dcdc1_resources[] = {
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{
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.start = WM831X_DC1_CONTROL_1,
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@ -1447,8 +1292,6 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
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mutex_init(&wm831x->io_lock);
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mutex_init(&wm831x->key_lock);
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mutex_init(&wm831x->auxadc_lock);
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init_completion(&wm831x->auxadc_done);
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dev_set_drvdata(wm831x->dev, wm831x);
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ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
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@ -1603,15 +1446,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
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if (ret != 0)
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goto err;
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if (wm831x->irq_base) {
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ret = request_threaded_irq(wm831x->irq_base +
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WM831X_IRQ_AUXADC_DATA,
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NULL, wm831x_auxadc_irq, 0,
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"auxadc", wm831x);
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if (ret < 0)
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dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
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ret);
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}
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wm831x_auxadc_init(wm831x);
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/* The core device is up, instantiate the subdevices. */
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switch (parent) {
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