forked from luck/tmp_suning_uos_patched
ARM: at91: pm: add ULP1 support for SAM9X60
Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in PMC if it is not enabled. At resume the state before suspend is restored. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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@ -100,6 +100,8 @@ static const struct wakeup_source_info ws_info[] = {
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{ .pmc_fsmr_bit = AT91_PMC_RTCAL, .shdwc_mr_bit = BIT(17) },
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{ .pmc_fsmr_bit = AT91_PMC_USBAL },
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{ .pmc_fsmr_bit = AT91_PMC_SDMMC_CD },
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{ .pmc_fsmr_bit = AT91_PMC_RTTAL },
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{ .pmc_fsmr_bit = AT91_PMC_RXLP_MCE },
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};
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static const struct of_device_id sama5d2_ws_ids[] = {
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@ -114,6 +116,17 @@ static const struct of_device_id sama5d2_ws_ids[] = {
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{ /* sentinel */ }
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};
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static const struct of_device_id sam9x60_ws_ids[] = {
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{ .compatible = "atmel,at91sam9x5-rtc", .data = &ws_info[1] },
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{ .compatible = "atmel,at91rm9200-ohci", .data = &ws_info[2] },
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{ .compatible = "usb-ohci", .data = &ws_info[2] },
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{ .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] },
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{ .compatible = "usb-ehci", .data = &ws_info[2] },
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{ .compatible = "atmel,at91sam9260-rtt", .data = &ws_info[4] },
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{ .compatible = "cdns,sam9x60-macb", .data = &ws_info[5] },
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{ /* sentinel */ }
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};
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static int at91_pm_config_ws(unsigned int pm_mode, bool set)
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{
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const struct wakeup_source_info *wsi;
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@ -192,6 +205,13 @@ static int at91_sama5d2_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)
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return 0;
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}
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static int at91_sam9x60_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)
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{
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writel(mode, pmc + AT91_PMC_FSMR);
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return 0;
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}
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/*
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* Called after processes are frozen, but before we shutdown devices.
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*/
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@ -789,8 +809,12 @@ void __init sam9x60_pm_init(void)
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if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
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return;
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at91_pm_modes_init();
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at91_dt_ramc();
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at91_pm_init(at91sam9x60_idle);
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soc_pm.ws_ids = sam9x60_ws_ids;
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soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
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}
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void __init at91sam9_pm_init(void)
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@ -197,8 +197,26 @@ ENDPROC(at91_backup_mode)
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.macro at91_pm_ulp1_mode
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ldr pmc, .pmc_base
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/* Switch the main clock source to 12-MHz RC oscillator */
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/* Save RC oscillator state and check if it is enabled. */
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ldr tmp1, [pmc, #AT91_PMC_SR]
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str tmp1, .saved_osc_status
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tst tmp1, #AT91_PMC_MOSCRCS
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bne 2f
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/* Enable RC oscillator */
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ldr tmp1, [pmc, #AT91_CKGR_MOR]
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orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
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bic tmp1, tmp1, #AT91_PMC_KEY_MASK
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orr tmp1, tmp1, #AT91_PMC_KEY
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str tmp1, [pmc, #AT91_CKGR_MOR]
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/* Wait main RC stabilization */
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1: ldr tmp1, [pmc, #AT91_PMC_SR]
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tst tmp1, #AT91_PMC_MOSCRCS
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beq 1b
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/* Switch the main clock source to 12-MHz RC oscillator */
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2: ldr tmp1, [pmc, #AT91_CKGR_MOR]
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bic tmp1, tmp1, #AT91_PMC_MOSCSEL
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bic tmp1, tmp1, #AT91_PMC_KEY_MASK
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orr tmp1, tmp1, #AT91_PMC_KEY
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@ -262,6 +280,25 @@ ENDPROC(at91_backup_mode)
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str tmp1, [pmc, #AT91_PMC_MCKR]
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wait_mckrdy
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/* Restore RC oscillator state */
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ldr tmp1, .saved_osc_status
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tst tmp1, #AT91_PMC_MOSCRCS
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bne 3f
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/* Disable RC oscillator */
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ldr tmp1, [pmc, #AT91_CKGR_MOR]
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bic tmp1, tmp1, #AT91_PMC_MOSCRCEN
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bic tmp1, tmp1, #AT91_PMC_KEY_MASK
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orr tmp1, tmp1, #AT91_PMC_KEY
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str tmp1, [pmc, #AT91_CKGR_MOR]
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/* Wait RC oscillator disable done */
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4: ldr tmp1, [pmc, #AT91_PMC_SR]
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tst tmp1, #AT91_PMC_MOSCRCS
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bne 4b
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3:
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.endm
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ENTRY(at91_ulp_mode)
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@ -475,6 +512,8 @@ ENDPROC(at91_sramc_self_refresh)
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.word 0
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.saved_sam9_mdr1:
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.word 0
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.saved_osc_status:
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.word 0
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ENTRY(at91_pm_suspend_in_sram_sz)
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.word .-at91_pm_suspend_in_sram
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@ -159,6 +159,7 @@
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#define AT91_PMC_FSMR 0x70 /* Fast Startup Mode Register */
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#define AT91_PMC_FSTT(n) BIT(n)
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#define AT91_PMC_RTTAL BIT(16)
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#define AT91_PMC_RTCAL BIT(17) /* RTC Alarm Enable */
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#define AT91_PMC_USBAL BIT(18) /* USB Resume Enable */
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#define AT91_PMC_SDMMC_CD BIT(19) /* SDMMC Card Detect Enable */
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