forked from luck/tmp_suning_uos_patched
clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs
The usb-clk on sun8i a23 and a33 SoCs is similar to the ones found on sun6i-a31 SoCs but instead of a 3th phy the a23 / a33 have a hsic interface which gets enabled by almost the same bits as used on the a31 for the 3rd phy, but not exactly the same bits so we need a new compatible for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
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@ -67,6 +67,7 @@ Required properties:
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"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
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"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
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"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
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"allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
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"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
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"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
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@ -204,6 +204,17 @@ static void __init sun6i_a31_usb_setup(struct device_node *node)
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}
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CLK_OF_DECLARE(sun6i_a31_usb, "allwinner,sun6i-a31-usb-clk", sun6i_a31_usb_setup);
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static const struct usb_clk_data sun8i_a23_usb_clk_data __initconst = {
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.clk_mask = BIT(16) | BIT(11) | BIT(10) | BIT(9) | BIT(8),
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.reset_mask = BIT(2) | BIT(1) | BIT(0),
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};
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static void __init sun8i_a23_usb_setup(struct device_node *node)
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{
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sunxi_usb_clk_setup(node, &sun8i_a23_usb_clk_data, &sun4i_a10_usb_lock);
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}
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CLK_OF_DECLARE(sun8i_a23_usb, "allwinner,sun8i-a23-usb-clk", sun8i_a23_usb_setup);
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static const struct usb_clk_data sun9i_a80_usb_mod_data __initconst = {
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.clk_mask = BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),
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.reset_mask = BIT(19) | BIT(18) | BIT(17),
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