forked from luck/tmp_suning_uos_patched
ASoC: mediatek: Fix UBSAN warning.
In sound/soc/mediatek/common/mtk-afe-fe-dai.c, when xxx_reg is -1, it's a no-op to call mtk_regmap_update_bits, but since both xxx_reg and xxx_shift are set to -1, the (1 << xxx_shift) in the argument would trigger a UBSAN warning. Fix the warning by setting those xxx_shift to 0 instead. Note that since the code explicitly checks .mono_shift >= 0 and .fs_shift >= 0 before using them in '<<' operator, those two members are not set to 0. Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
4e08d50d1f
commit
ed1666f686
|
@ -197,11 +197,10 @@ int mtk_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd,
|
|||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
if (memif->data->enable_shift >= 0)
|
||||
mtk_regmap_update_bits(afe->regmap,
|
||||
memif->data->enable_reg,
|
||||
1 << memif->data->enable_shift,
|
||||
1 << memif->data->enable_shift);
|
||||
mtk_regmap_update_bits(afe->regmap,
|
||||
memif->data->enable_reg,
|
||||
1 << memif->data->enable_shift,
|
||||
1 << memif->data->enable_shift);
|
||||
|
||||
/* set irq counter */
|
||||
mtk_regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
|
||||
|
|
|
@ -994,7 +994,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 6,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DL2",
|
||||
|
@ -1013,7 +1012,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 7,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DL3",
|
||||
|
@ -1032,7 +1030,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 8,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DL4",
|
||||
|
@ -1051,7 +1048,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 9,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DL5",
|
||||
|
@ -1070,7 +1066,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 10,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DLM",
|
||||
|
@ -1089,7 +1084,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 12,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "UL1",
|
||||
|
@ -1108,7 +1102,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 0,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "UL2",
|
||||
|
@ -1127,7 +1120,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "UL3",
|
||||
|
@ -1146,7 +1138,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 2,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "UL4",
|
||||
|
@ -1165,7 +1156,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 3,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "UL5",
|
||||
|
@ -1184,7 +1174,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 4,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "DLBT",
|
||||
|
@ -1203,7 +1192,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 13,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
{
|
||||
.name = "ULBT",
|
||||
|
@ -1222,7 +1210,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
|
|||
.agent_disable_reg = AUDIO_TOP_CON5,
|
||||
.agent_disable_shift = 16,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -401,9 +401,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL1_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_DL2] = {
|
||||
.name = "DL2",
|
||||
|
@ -420,9 +418,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL2_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_DL3] = {
|
||||
.name = "DL3",
|
||||
|
@ -439,9 +435,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL3_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_VUL] = {
|
||||
.name = "VUL",
|
||||
|
@ -458,9 +452,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = VUL_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_AWB] = {
|
||||
.name = "AWB",
|
||||
|
@ -477,9 +469,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = AWB_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_VUL12] = {
|
||||
.name = "VUL12",
|
||||
|
@ -496,9 +486,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = VUL_DATA2_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_DAI] = {
|
||||
.name = "DAI",
|
||||
|
@ -515,9 +503,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DAI_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT6797_MEMIF_MOD_DAI] = {
|
||||
.name = "MOD_DAI",
|
||||
|
@ -534,9 +520,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = MOD_DAI_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -714,13 +714,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = AFE_DAC_CON1,
|
||||
.mono_shift = 21,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 1,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 0,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "DL2",
|
||||
.id = MT8173_AFE_MEMIF_DL2,
|
||||
|
@ -732,13 +730,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = AFE_DAC_CON1,
|
||||
.mono_shift = 22,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 2,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 1,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "VUL",
|
||||
.id = MT8173_AFE_MEMIF_VUL,
|
||||
|
@ -750,13 +746,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = AFE_DAC_CON1,
|
||||
.mono_shift = 27,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 3,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 6,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "DAI",
|
||||
.id = MT8173_AFE_MEMIF_DAI,
|
||||
|
@ -768,13 +762,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = -1,
|
||||
.mono_shift = -1,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 4,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 5,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "AWB",
|
||||
.id = MT8173_AFE_MEMIF_AWB,
|
||||
|
@ -786,13 +778,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = AFE_DAC_CON1,
|
||||
.mono_shift = 24,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 6,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 3,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "MOD_DAI",
|
||||
.id = MT8173_AFE_MEMIF_MOD_DAI,
|
||||
|
@ -804,13 +794,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = AFE_DAC_CON1,
|
||||
.mono_shift = 30,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = AFE_DAC_CON0,
|
||||
.enable_shift = 7,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 4,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
}, {
|
||||
.name = "HDMI",
|
||||
.id = MT8173_AFE_MEMIF_HDMI,
|
||||
|
@ -822,13 +810,10 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
|
|||
.mono_reg = -1,
|
||||
.mono_shift = -1,
|
||||
.hd_reg = -1,
|
||||
.hd_shift = -1,
|
||||
.enable_reg = -1,
|
||||
.enable_shift = -1,
|
||||
.msb_reg = AFE_MEMIF_MSB,
|
||||
.msb_shift = 8,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -914,7 +899,6 @@ static const struct mtk_base_irq_data irq_data[MT8173_AFE_IRQ_NUM] = {
|
|||
.irq_en_reg = AFE_IRQ_MCU_CON,
|
||||
.irq_en_shift = 12,
|
||||
.irq_fs_reg = -1,
|
||||
.irq_fs_shift = -1,
|
||||
.irq_fs_maskbit = -1,
|
||||
.irq_clr_reg = AFE_IRQ_CLR,
|
||||
.irq_clr_shift = 4,
|
||||
|
|
|
@ -421,9 +421,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL1_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_DL2] = {
|
||||
.name = "DL2",
|
||||
|
@ -440,9 +438,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL2_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_DL3] = {
|
||||
.name = "DL3",
|
||||
|
@ -459,9 +455,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = DL3_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_VUL2] = {
|
||||
.name = "VUL2",
|
||||
|
@ -478,9 +472,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = VUL2_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_AWB] = {
|
||||
.name = "AWB",
|
||||
|
@ -497,9 +489,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = AWB_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_AWB2] = {
|
||||
.name = "AWB2",
|
||||
|
@ -516,9 +506,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = AWB2_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_VUL12] = {
|
||||
.name = "VUL12",
|
||||
|
@ -535,9 +523,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = VUL12_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_MOD_DAI] = {
|
||||
.name = "MOD_DAI",
|
||||
|
@ -554,9 +540,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = MOD_DAI_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
[MT8183_MEMIF_HDMI] = {
|
||||
.name = "HDMI",
|
||||
|
@ -569,13 +553,10 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
|
|||
.mono_reg = -1,
|
||||
.mono_shift = -1,
|
||||
.enable_reg = -1, /* control in tdm for sync start */
|
||||
.enable_shift = -1,
|
||||
.hd_reg = AFE_MEMIF_HD_MODE,
|
||||
.hd_shift = HDMI_HD_SFT,
|
||||
.agent_disable_reg = -1,
|
||||
.agent_disable_shift = -1,
|
||||
.msb_reg = -1,
|
||||
.msb_shift = -1,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -690,7 +671,6 @@ static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = {
|
|||
.irq_cnt_shift = 0,
|
||||
.irq_cnt_maskbit = 0x3ffff,
|
||||
.irq_fs_reg = -1,
|
||||
.irq_fs_shift = -1,
|
||||
.irq_fs_maskbit = -1,
|
||||
.irq_en_reg = AFE_IRQ_MCU_CON0,
|
||||
.irq_en_shift = IRQ8_MCU_ON_SFT,
|
||||
|
|
Loading…
Reference in New Issue
Block a user