forked from luck/tmp_suning_uos_patched
[MIPS] Optimize csum_partial for 64bit kernel
Make csum_partial 64-bit powered. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -29,30 +29,49 @@
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define USE_DOUBLE
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#endif
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#define ADDC(sum,reg) \
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addu sum, reg; \
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sltu v1, sum, reg; \
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addu sum, v1
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#ifdef USE_DOUBLE
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#define LOAD ld
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#define ADD daddu
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#define NBYTES 8
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#else
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#define LOAD lw
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#define ADD addu
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#define NBYTES 4
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#endif /* USE_DOUBLE */
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#define UNIT(unit) ((unit)*NBYTES)
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#define ADDC(sum,reg) \
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ADD sum, reg; \
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sltu v1, sum, reg; \
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ADD sum, v1
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#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
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LOAD _t0, (offset + UNIT(0))(src); \
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LOAD _t1, (offset + UNIT(1))(src); \
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LOAD _t2, (offset + UNIT(2))(src); \
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LOAD _t3, (offset + UNIT(3))(src); \
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ADDC(sum, _t0); \
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ADDC(sum, _t1); \
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ADDC(sum, _t2); \
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ADDC(sum, _t3)
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#ifdef USE_DOUBLE
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#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
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lw _t0, (offset + 0x00)(src); \
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lw _t1, (offset + 0x04)(src); \
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lw _t2, (offset + 0x08)(src); \
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lw _t3, (offset + 0x0c)(src); \
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ADDC(sum, _t0); \
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ADDC(sum, _t1); \
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ADDC(sum, _t2); \
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ADDC(sum, _t3); \
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lw _t0, (offset + 0x10)(src); \
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lw _t1, (offset + 0x14)(src); \
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lw _t2, (offset + 0x18)(src); \
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lw _t3, (offset + 0x1c)(src); \
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ADDC(sum, _t0); \
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ADDC(sum, _t1); \
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ADDC(sum, _t2); \
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ADDC(sum, _t3); \
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CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)
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#else
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#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
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CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3); \
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CSUM_BIGCHUNK1(src, offset + 0x10, sum, _t0, _t1, _t2, _t3)
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#endif
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/*
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* a0: source address
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@ -117,11 +136,17 @@ qword_align:
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beqz t8, oword_align
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andi t8, src, 0x10
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#ifdef USE_DOUBLE
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ld t0, 0x00(src)
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LONG_SUBU a1, a1, 0x8
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ADDC(sum, t0)
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#else
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lw t0, 0x00(src)
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lw t1, 0x04(src)
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LONG_SUBU a1, a1, 0x8
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ADDC(sum, t0)
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ADDC(sum, t1)
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#endif
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PTR_ADDU src, src, 0x8
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andi t8, src, 0x10
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@ -129,14 +154,14 @@ oword_align:
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beqz t8, begin_movement
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LONG_SRL t8, a1, 0x7
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lw t3, 0x08(src)
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lw t4, 0x0c(src)
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lw t0, 0x00(src)
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lw t1, 0x04(src)
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ADDC(sum, t3)
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ADDC(sum, t4)
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#ifdef USE_DOUBLE
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ld t0, 0x00(src)
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ld t1, 0x08(src)
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ADDC(sum, t0)
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ADDC(sum, t1)
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#else
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CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
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#endif
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LONG_SUBU a1, a1, 0x10
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PTR_ADDU src, src, 0x10
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LONG_SRL t8, a1, 0x7
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@ -219,6 +244,13 @@ small_csumcpy:
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1: ADDC(sum, t1)
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/* fold checksum */
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#ifdef USE_DOUBLE
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dsll32 v1, sum, 0
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daddu sum, v1
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sltu v1, sum, v1
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dsra32 sum, sum, 0
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addu sum, v1
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#endif
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sll v1, sum, 16
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addu sum, v1
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sltu v1, sum, v1
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