forked from luck/tmp_suning_uos_patched
igb: support BCM54616 PHY
The management port on an Edgecore AS7712-32 switch uses an igb MAC, but it uses a BCM54616 PHY. Without a patch like this, loading the igb module produces dmesg output like this: [ 3.439125] igb: Copyright (c) 2007-2014 Intel Corporation. [ 3.439866] igb: probe of 0000:00:14.0 failed with error -2 Signed-off-by: John W Linville <linville@tuxdriver.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -340,6 +340,9 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
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phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
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phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
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break;
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case BCM54616_E_PHY_ID:
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phy->type = e1000_phy_bcm54616;
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break;
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default:
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ret_val = -E1000_ERR_PHY;
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goto out;
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@ -1659,6 +1662,9 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
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case e1000_phy_82580:
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ret_val = igb_copper_link_setup_82580(hw);
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break;
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case e1000_phy_bcm54616:
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ret_val = 0;
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break;
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default:
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ret_val = -E1000_ERR_PHY;
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break;
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@ -889,6 +889,7 @@
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#define I210_I_PHY_ID 0x01410C00
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#define M88E1543_E_PHY_ID 0x01410EA0
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#define M88E1512_E_PHY_ID 0x01410DD0
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#define BCM54616_E_PHY_ID 0x03625D10
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/* M88E1000 Specific Registers */
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#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */
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@ -128,6 +128,7 @@ enum e1000_phy_type {
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e1000_phy_ife,
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e1000_phy_82580,
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e1000_phy_i210,
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e1000_phy_bcm54616,
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};
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enum e1000_bus_type {
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