forked from luck/tmp_suning_uos_patched
ASoC: Updates for 3.5
All driver specific and fairly small. The pxa-ssp changes are larger than I'd like but they're build failures and are pretty clear to inspection. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJP3kOeAAoJEBus8iNuMP3dpf0QAJLZjq1Ttzcm2ZrtYkr6edgm axHhApj6ptOlLqb16zCJ+zjgmjUy/GteJg766KZqAkvMJxWSPRaPr/aTQnWlxUAE CU/WjdywbVPKIkn5/r+jpEOifsHNTzj14/gF1Cn9V+58pN6YgflmfElV2vFe3rdX IrNxGfRBHDgHwqDbHTi2OL8xUTE4oJnnhQZxk7FcsYKiwpwB2hVkbrTTKGNBPL4d DoV8Xcy+Zb12iDQwh9BvzYAznQTQwCjGsF11UVAb0ChTV14XExQTABNZnAL3hgfj AhBtm/coDmym61AvQMddsbg8Hrlp/d9Qzmr+0Fxj9HBb+SGVt9XlHY3ETePBM4hQ wIjhedCed4Pv/Jb9IYDzQ1wJD/9iDG+Xuyj1iQC1QQKaoKg6eI9QgTLoVwRHCssg DVTzFPOFEFiIfI+eH2cLyZZZlWL1LDbeVmH+KvWthb6+mbfOXo/VPlely2Odl+b7 NErfdjbggoc4Oy8o4Lo0XMb/6HxE7tHd/AzbKHdeHjNk8BCn5NCrdOLSuJb3xrr5 8fLP/0T9Z955R6YsHNg88rhQ74QhWSLGvs9TjUw7sRHN9xkC4gQIwcJ5i0dZcXjC zIdP0Lj8XB0FdDGYNALdy2B48jU1uKs0cGW+xV/Z0uA0QllB0pfFy+O49z+jRKzJ d/cIeM8hsxyOHWS4y+BJ =67R8 -----END PGP SIGNATURE----- Merge tag 'asoc-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for 3.5 All driver specific and fairly small. The pxa-ssp changes are larger than I'd like but they're build failures and are pretty clear to inspection.
This commit is contained in:
Takashi Iwai
commit
ef890ae9b3
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@ -193,6 +193,7 @@ static const struct platform_device_id ssp_id_table[] = {
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{ "pxa25x-nssp", PXA25x_NSSP },
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{ "pxa27x-ssp", PXA27x_SSP },
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{ "pxa168-ssp", PXA168_SSP },
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{ "pxa910-ssp", PXA910_SSP },
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{ },
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};
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@ -160,7 +160,9 @@ enum pxa_ssp_type {
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PXA25x_SSP, /* pxa 210, 250, 255, 26x */
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PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
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PXA27x_SSP,
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PXA3xx_SSP,
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PXA168_SSP,
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PXA910_SSP,
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CE4100_SSP,
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};
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@ -43,7 +43,7 @@ struct pxa2xx_spi_chip {
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void (*cs_control)(u32 command);
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};
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#ifdef CONFIG_ARCH_PXA
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#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
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#include <linux/clk.h>
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#include <mach/dma.h>
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@ -1863,6 +1863,7 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
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return ret;
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}
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regcache_cache_only(wm8904->regmap, false);
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regcache_sync(wm8904->regmap);
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/* Enable bias */
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@ -1899,14 +1900,8 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
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snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
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WM8904_BIAS_ENA, 0);
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#ifdef CONFIG_REGULATOR
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/* Post 2.6.34 we will be able to get a callback when
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* the regulators are disabled which we can use but
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* for now just assume that the power will be cut if
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* the regulator API is in use.
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*/
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codec->cache_sync = 1;
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#endif
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regcache_cache_only(wm8904->regmap, true);
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regcache_mark_dirty(wm8904->regmap);
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regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies),
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wm8904->supplies);
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@ -2084,10 +2079,8 @@ static int wm8904_probe(struct snd_soc_codec *codec)
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{
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struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
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struct wm8904_pdata *pdata = wm8904->pdata;
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u16 *reg_cache = codec->reg_cache;
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int ret, i;
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codec->cache_sync = 1;
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codec->control_data = wm8904->regmap;
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switch (wm8904->devtype) {
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@ -2150,6 +2143,7 @@ static int wm8904_probe(struct snd_soc_codec *codec)
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goto err_enable;
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}
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regcache_cache_only(wm8904->regmap, true);
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/* Change some default settings - latch VU and enable ZC */
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snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_LEFT,
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WM8904_ADC_VU, WM8904_ADC_VU);
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@ -2180,14 +2174,18 @@ static int wm8904_probe(struct snd_soc_codec *codec)
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if (!pdata->gpio_cfg[i])
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continue;
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reg_cache[WM8904_GPIO_CONTROL_1 + i]
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= pdata->gpio_cfg[i] & 0xffff;
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regmap_update_bits(wm8904->regmap,
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WM8904_GPIO_CONTROL_1 + i,
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0xffff,
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pdata->gpio_cfg[i]);
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}
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/* Zero is the default value for these anyway */
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for (i = 0; i < WM8904_MIC_REGS; i++)
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reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i]
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= pdata->mic_cfg[i];
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regmap_update_bits(wm8904->regmap,
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WM8904_MIC_BIAS_CONTROL_0 + i,
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0xffff,
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pdata->mic_cfg[i]);
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}
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/* Set Class W by default - this will be managed by the Class
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@ -2837,8 +2837,6 @@ static int wm8996_probe(struct snd_soc_codec *codec)
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}
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}
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regcache_cache_only(codec->control_data, true);
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/* Apply platform data settings */
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snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL,
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WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK,
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@ -3051,7 +3049,6 @@ static int wm8996_remove(struct snd_soc_codec *codec)
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for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
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regulator_unregister_notifier(wm8996->supplies[i].consumer,
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&wm8996->disable_nb[i]);
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regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
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return 0;
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}
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@ -3206,14 +3203,15 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c,
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dev_info(&i2c->dev, "revision %c\n",
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(reg & WM8996_CHIP_REV_MASK) + 'A');
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regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
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ret = wm8996_reset(wm8996);
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if (ret < 0) {
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dev_err(&i2c->dev, "Failed to issue reset\n");
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goto err_regmap;
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}
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regcache_cache_only(wm8996->regmap, true);
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regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
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wm8996_init_gpio(wm8996);
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ret = snd_soc_register_codec(&i2c->dev,
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@ -33,7 +33,6 @@
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#include <mach/hardware.h>
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#include <mach/dma.h>
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#include <mach/audio.h>
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#include "../../arm/pxa2xx-pcm.h"
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#include "pxa-ssp.h"
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@ -194,7 +193,7 @@ static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
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{
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u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
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if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
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if (ssp->type == PXA25x_SSP) {
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sscr0 &= ~0x0000ff00;
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sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
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} else {
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@ -212,7 +211,7 @@ static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
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u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
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u32 div;
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if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
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if (ssp->type == PXA25x_SSP)
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div = ((sscr0 >> 8) & 0xff) * 2 + 2;
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else
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div = ((sscr0 >> 8) & 0xfff) + 1;
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@ -242,7 +241,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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break;
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case PXA_SSP_CLK_PLL:
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/* Internal PLL is fixed */
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if (cpu_is_pxa25x())
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if (ssp->type == PXA25x_SSP)
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priv->sysclk = 1843200;
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else
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priv->sysclk = 13000000;
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@ -266,11 +265,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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/* The SSP clock must be disabled when changing SSP clock mode
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* on PXA2xx. On PXA3xx it must be enabled when doing so. */
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if (!cpu_is_pxa3xx())
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if (ssp->type != PXA3xx_SSP)
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clk_disable(ssp->clk);
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val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
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pxa_ssp_write_reg(ssp, SSCR0, val);
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if (!cpu_is_pxa3xx())
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if (ssp->type != PXA3xx_SSP)
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clk_enable(ssp->clk);
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return 0;
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@ -294,24 +293,20 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
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case PXA_SSP_AUDIO_DIV_SCDB:
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val = pxa_ssp_read_reg(ssp, SSACD);
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val &= ~SSACD_SCDB;
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#if defined(CONFIG_PXA3xx)
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if (cpu_is_pxa3xx())
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if (ssp->type == PXA3xx_SSP)
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val &= ~SSACD_SCDX8;
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#endif
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switch (div) {
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case PXA_SSP_CLK_SCDB_1:
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val |= SSACD_SCDB;
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break;
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case PXA_SSP_CLK_SCDB_4:
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break;
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#if defined(CONFIG_PXA3xx)
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case PXA_SSP_CLK_SCDB_8:
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if (cpu_is_pxa3xx())
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if (ssp->type == PXA3xx_SSP)
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val |= SSACD_SCDX8;
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else
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return -EINVAL;
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break;
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#endif
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default:
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return -EINVAL;
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}
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@ -337,10 +332,8 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
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struct ssp_device *ssp = priv->ssp;
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u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
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#if defined(CONFIG_PXA3xx)
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if (cpu_is_pxa3xx())
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if (ssp->type == PXA3xx_SSP)
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pxa_ssp_write_reg(ssp, SSACDD, 0);
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#endif
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switch (freq_out) {
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case 5622000:
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@ -365,11 +358,10 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
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break;
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default:
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#ifdef CONFIG_PXA3xx
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/* PXA3xx has a clock ditherer which can be used to generate
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* a wider range of frequencies - calculate a value for it.
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*/
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if (cpu_is_pxa3xx()) {
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if (ssp->type == PXA3xx_SSP) {
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u32 val;
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u64 tmp = 19968;
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tmp *= 1000000;
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@ -386,7 +378,6 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
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val, freq_out);
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break;
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}
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#endif
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return -EINVAL;
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}
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@ -590,10 +581,8 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
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/* bit size */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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#ifdef CONFIG_PXA3xx
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if (cpu_is_pxa3xx())
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if (ssp->type == PXA3xx_SSP)
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sscr0 |= SSCR0_FPCKE;
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#endif
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sscr0 |= SSCR0_DataSize(16);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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@ -618,9 +607,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
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* trying and failing a lot; some of the registers
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* needed for that mode are only available on PXA3xx.
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*/
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#ifdef CONFIG_PXA3xx
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if (!cpu_is_pxa3xx())
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if (ssp->type != PXA3xx_SSP)
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return -EINVAL;
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sspsp |= SSPSP_SFRMWDTH(width * 2);
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@ -628,9 +615,6 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
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sspsp |= SSPSP_EDMYSTOP(3);
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sspsp |= SSPSP_DMYSTOP(3);
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sspsp |= SSPSP_DMYSTRT(1);
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#else
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return -EINVAL;
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#endif
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} else {
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/* The frame width is the width the LRCLK is
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* asserted for; the delay is expressed in
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@ -346,6 +346,17 @@ static int tegra_wm8903_init(struct snd_soc_pcm_runtime *rtd)
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return 0;
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}
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static int tegra_wm8903_remove(struct snd_soc_card *card)
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{
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struct snd_soc_pcm_runtime *rtd = &(card->rtd[0]);
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struct snd_soc_dai *codec_dai = rtd->codec_dai;
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struct snd_soc_codec *codec = codec_dai->codec;
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wm8903_mic_detect(codec, NULL, 0, 0);
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return 0;
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}
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static struct snd_soc_dai_link tegra_wm8903_dai = {
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.name = "WM8903",
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.stream_name = "WM8903 PCM",
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@ -363,6 +374,8 @@ static struct snd_soc_card snd_soc_tegra_wm8903 = {
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.dai_link = &tegra_wm8903_dai,
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.num_links = 1,
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.remove = tegra_wm8903_remove,
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.controls = tegra_wm8903_controls,
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.num_controls = ARRAY_SIZE(tegra_wm8903_controls),
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.dapm_widgets = tegra_wm8903_dapm_widgets,
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